From patchwork Fri Apr 22 17:14:01 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 66471 Delivered-To: patch@linaro.org Received: by 10.140.93.198 with SMTP id d64csp838859qge; Fri, 22 Apr 2016 10:14:39 -0700 (PDT) X-Received: by 10.66.232.226 with SMTP id tr2mr30150127pac.44.1461345276789; Fri, 22 Apr 2016 10:14:36 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b5si8583563pat.133.2016.04.22.10.14.36; Fri, 22 Apr 2016 10:14:36 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932357AbcDVRO1 (ORCPT + 29 others); Fri, 22 Apr 2016 13:14:27 -0400 Received: from mail-io0-f172.google.com ([209.85.223.172]:34253 "EHLO mail-io0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932272AbcDVROZ (ORCPT ); Fri, 22 Apr 2016 13:14:25 -0400 Received: by mail-io0-f172.google.com with SMTP id 2so125523002ioy.1 for ; Fri, 22 Apr 2016 10:14:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=9m8g62/01FIdn6xBl9EFtVlapfsK86PQEBK0NCqLp/Q=; b=WajMNUeWIFYbJZPcdc4uRKP3MkFSCL4RAmoKB66cso4u0CStCtZrlp+CUC0WsuBm1J xMwe/855kMuF62ocCXvqyvYn0+G2O+51sUUnwilwz967BKKLEVqnVrFf4RjvXoCXYQP/ PjWJ1z8ge8Xc8CJzLSBLiNSYVRve7WeASP2iI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9m8g62/01FIdn6xBl9EFtVlapfsK86PQEBK0NCqLp/Q=; b=cjyDknlqigYyNv1n6GY7dZ2QqqF4HdzLIybR7+Fi+FGnwtX/jWWu7t25w/OD1LeYAG VnJTdyP5tOER4qFXsSrtvqMrXXUi1vZj1LjLY0NAz/ZnkjWuVAVtMIGA9MCDmEfBcLD8 Z6Pd8J0R8DkwzHuP1yk81HGPUeSDjcBLbbE7LVQsS0/eRKO2eA025x8eoJ2mKckkZKFJ Ayhnv50njF+NZkQsNWE67PRQLpHiZGv5E5FQNRmIXzIIgEvDkdWWi32qs4Scn9ctKjrP 3+1ux6Z8qb0LUje3X9EaVpdiKLH8PA8nz/DAuI3xHNtPTbtYJtlXfkNkGyAI15hxQLHJ SICg== X-Gm-Message-State: AOPr4FXohGfZVVxZhLTJyNv4/BzC/0EfA00rKDFM16DY6BB4TMbDCZe2vOHEdQZXtrQVqdIc X-Received: by 10.107.25.68 with SMTP id 65mr26884918ioz.98.1461345264743; Fri, 22 Apr 2016 10:14:24 -0700 (PDT) Received: from t430.cg.shawcable.net (S0106002369de4dac.cg.shawcable.net. [68.147.8.254]) by smtp.gmail.com with ESMTPSA id vg8sm1975886igb.15.2016.04.22.10.14.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 22 Apr 2016 10:14:23 -0700 (PDT) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org, Suzuki.Poulose@arm.com Cc: linux-kernel@vger.kernel.org Subject: [PATCH V3 04/18] coresight: tmc: clearly define number of transfers per burst Date: Fri, 22 Apr 2016 11:14:01 -0600 Message-Id: <1461345255-11758-5-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1461345255-11758-1-git-send-email-mathieu.poirier@linaro.org> References: <1461345255-11758-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch makes the name of the define reflect the amount of data tranfers per burst, in this case 16. Signed-off-by: Mathieu Poirier Reviewed-by: Suzuki K Poulose --- drivers/hwtracing/coresight/coresight-tmc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.5.0 diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c index d211aeec49f8..8751d53fa078 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.c +++ b/drivers/hwtracing/coresight/coresight-tmc.c @@ -67,7 +67,7 @@ #define TMC_AXICTL_PROT_CTL_B0 BIT(0) #define TMC_AXICTL_PROT_CTL_B1 BIT(1) #define TMC_AXICTL_SCT_GAT_MODE BIT(7) -#define TMC_AXICTL_WR_BURST_LEN 0xF00 +#define TMC_AXICTL_WR_BURST_16 0xF00 /* TMC_FFCR - 0x304 */ #define TMC_FFCR_EN_FMT BIT(0) #define TMC_FFCR_EN_TI BIT(1) @@ -211,7 +211,7 @@ static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata) writel_relaxed(TMC_MODE_CIRCULAR_BUFFER, drvdata->base + TMC_MODE); axictl = readl_relaxed(drvdata->base + TMC_AXICTL); - axictl |= TMC_AXICTL_WR_BURST_LEN; + axictl |= TMC_AXICTL_WR_BURST_16; writel_relaxed(axictl, drvdata->base + TMC_AXICTL); axictl &= ~TMC_AXICTL_SCT_GAT_MODE; writel_relaxed(axictl, drvdata->base + TMC_AXICTL);