From patchwork Thu Apr 21 15:07:40 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 66387 Delivered-To: patch@linaro.org Received: by 10.140.93.198 with SMTP id d64csp203360qge; Thu, 21 Apr 2016 08:07:54 -0700 (PDT) X-Received: by 10.66.162.39 with SMTP id xx7mr20910741pab.97.1461251274665; Thu, 21 Apr 2016 08:07:54 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s16si1057072pfi.193.2016.04.21.08.07.54; Thu, 21 Apr 2016 08:07:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752999AbcDUPHw (ORCPT + 29 others); Thu, 21 Apr 2016 11:07:52 -0400 Received: from mail-wm0-f49.google.com ([74.125.82.49]:36882 "EHLO mail-wm0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752168AbcDUPHu (ORCPT ); Thu, 21 Apr 2016 11:07:50 -0400 Received: by mail-wm0-f49.google.com with SMTP id n3so138264132wmn.0 for ; Thu, 21 Apr 2016 08:07:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=tYI3tcpnU/XstkheNkUaEHTQ9qqBCBQRE7hI4Gj5Ch4=; b=Hgnw23d8WVmkzpQon34RKschtv4tBlK+w9rVFSG2Ddnn/5MpeeGEUOowVbkrPrTX+Y 5ftm+zoWNoDK22U9rCHw4v9T3vmpL24tImR8DfunJtsvAHPkZUivX+I0Dd4IxVv/QGC2 7M/yDSKDj2yhQRuQazVgiwPGNQR624pt9rWT0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=tYI3tcpnU/XstkheNkUaEHTQ9qqBCBQRE7hI4Gj5Ch4=; b=YIoHYTVDgFPctRdjBbcOZJsL+RnwjziWCMYka0rZ8Y7cOgOP8RlFFyP7HYBbHM4uN4 1wcAtGDR7NS7RFsfne31VIDCDQe3Gja9elL7pjqWAb1smpBzDXzsO0d4EDnxLKH/sHhq MFmKOy6mc/sq1oDHmMTwTsGUMTbKe8AQF6xKMsANpic8WB9NZjTKgiFO3lzs327Qu7Hz /IWWMBgsk1HKkZaXEp9O1Qx1Z4gYhVWueuxw+D79RK3YYam8jxf3CeP/cLtb7RQsmc8G eCVqaHP4pQbDeMuhgx6ypS3Xd+Uytu6Hl9mtaFl/vGV9a/pCb0lCdO75Ui+TmNppRAHB wcpQ== X-Gm-Message-State: AOPr4FWV4XpOjktDikmOHBLEvKtrrwTI+faDAXXml9gsTCSXTtLu3rPup8LJfxhYtnJkLXVC X-Received: by 10.28.53.193 with SMTP id c184mr19732558wma.93.1461251269429; Thu, 21 Apr 2016 08:07:49 -0700 (PDT) Received: from dell.localdomain (host81-129-172-5.range81-129.btcentralplus.com. [81.129.172.5]) by smtp.gmail.com with ESMTPSA id s6sm3288875wjy.31.2016.04.21.08.07.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Apr 2016 08:07:48 -0700 (PDT) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: kernel@stlinux.com, maxime.coquelin@st.com, Lee Jones Subject: [[PATCH v2] 1/8] ARM: dts: STi: STiH407: Provide generic (safe) DVFS configuration Date: Thu, 21 Apr 2016 16:07:40 +0100 Message-Id: <1461251267-14897-1-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 2.8.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org You'll notice that the voltage cell is populated with 0's. Voltage information is very platform specific, even depends on 'cut' and 'substrate' versions. Thus it is left blank for a generic (safe) implementation. If other nodes/properties are provided by the bootloader, the ST CPUFreq driver will over-ride these generic values. Signed-off-by: Lee Jones Signed-off-by: Maxime Coquelin --- arch/arm/boot/dts/stih407-family.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.8.0 diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi index 81f8121..9fa1e58 100644 --- a/arch/arm/boot/dts/stih407-family.dtsi +++ b/arch/arm/boot/dts/stih407-family.dtsi @@ -22,15 +22,29 @@ device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <0>; + /* u-boot puts hpen in SBC dmem at 0xa4 offset */ cpu-release-addr = <0x94100A4>; + + /* kHz uV */ + operating-points = <1500000 0 + 1200000 0 + 800000 0 + 500000 0>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <1>; + /* u-boot puts hpen in SBC dmem at 0xa4 offset */ cpu-release-addr = <0x94100A4>; + + /* kHz uV */ + operating-points = <1500000 0 + 1200000 0 + 800000 0 + 500000 0>; }; };