From patchwork Thu Apr 21 11:04:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Griffin X-Patchwork-Id: 66367 Delivered-To: patch@linaro.org Received: by 10.140.93.198 with SMTP id d64csp74121qge; Thu, 21 Apr 2016 04:06:45 -0700 (PDT) X-Received: by 10.98.102.151 with SMTP id s23mr19636389pfj.75.1461236805337; Thu, 21 Apr 2016 04:06:45 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id kd12si758352pad.15.2016.04.21.04.06.45; Thu, 21 Apr 2016 04:06:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752395AbcDULFR (ORCPT + 29 others); Thu, 21 Apr 2016 07:05:17 -0400 Received: from mail-wm0-f51.google.com ([74.125.82.51]:38813 "EHLO mail-wm0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752347AbcDULFN (ORCPT ); Thu, 21 Apr 2016 07:05:13 -0400 Received: by mail-wm0-f51.google.com with SMTP id u206so126293768wme.1 for ; Thu, 21 Apr 2016 04:05:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=cbYXnMz46mhUnDFxMceR+hauP2DJK+nHkauZpxsrXLg=; b=hEFN78aKggErXRKlo9pRsvVglpqJff3kvd5WpYVGihdl6cmXrTVgX8fxtGPzkgWi+b 5SNQJ/x8RRQRB75Jd/eVfNFcgWwFg1ZHKekl2NObG18IEjGJ+NqLYMVR5+B4RUD9MWZq mcDtQR5/wrCU2PdxvvtOV1+J073yHDseBY6a4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=cbYXnMz46mhUnDFxMceR+hauP2DJK+nHkauZpxsrXLg=; b=cYK/o9w3utVi5jtIo4hkdfnXTjXyaPTMjYJozEP9FGLkxnA1FkwJ80P1Gmq42MdKfQ 4RdKxSpUGXN1HaDCpnES78rn+DncaQmCkFXlI8H8Ri0hS6+/WgHD/3AT6Cpxk5Z7E3lC xPErfVTPq7d2+C0vXB0OjyvWqewk6L19BwxZ1baUWP+XDeMYlSceEfRDLv7qF1LWx9ml 0JPGanGVaYxghZCPt9KD61y7zWXR5LuiphksFkT9dwxkNmRSoJXkFPtxnS2bXql9qD4Z SK60fA5FFGxm4hAGLS2qcVTGAuxyHNzcCxva0u83k0MzweXS8UyoHwH2eaQenA0vz3S9 gfvQ== X-Gm-Message-State: AOPr4FVFvnLBCm8H3m5A6jMxP9p8E5dD86PU38MT+XJGXi3QcRKNaHGhhwNnwPviaZ2K3aXh X-Received: by 10.28.23.70 with SMTP id 67mr13869794wmx.70.1461236712257; Thu, 21 Apr 2016 04:05:12 -0700 (PDT) Received: from localhost.localdomain (cpc84787-aztw28-2-0-cust15.18-1.cable.virginm.net. [82.37.140.16]) by smtp.gmail.com with ESMTPSA id v143sm9184279wmv.4.2016.04.21.04.05.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 21 Apr 2016 04:05:11 -0700 (PDT) From: Peter Griffin To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, srinivas.kandagatla@gmail.com, maxime.coquelin@st.com, patrice.chotard@st.com, vinod.koul@intel.com Cc: peter.griffin@linaro.org, lee.jones@linaro.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, arnd@arndb.de, broonie@kernel.org, ludovic.barre@st.com Subject: [PATCH 13/18] ARM: DT: STiH407: Add i2s_in pinctrl configuration Date: Thu, 21 Apr 2016 12:04:30 +0100 Message-Id: <1461236675-10176-14-git-send-email-peter.griffin@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1461236675-10176-1-git-send-email-peter.griffin@linaro.org> References: <1461236675-10176-1-git-send-email-peter.griffin@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds the pinctrl config for the i2s_in pins used by the uniperif reader IP. Signed-off-by: Peter Griffin --- arch/arm/boot/dts/stih407-pinctrl.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) -- 1.9.1 diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi index 0fb5c8a..537db7e 100644 --- a/arch/arm/boot/dts/stih407-pinctrl.dtsi +++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi @@ -1090,6 +1090,30 @@ }; }; + i2s_in { + pinctrl_i2s_8ch_in: i2s_8ch_in{ + st,pins { + mclk = <&pio32 5 ALT1 IN>; + lrclk = <&pio32 7 ALT1 IN>; + sclk = <&pio32 6 ALT1 IN>; + data0 = <&pio32 4 ALT1 IN>; + data1 = <&pio33 0 ALT1 IN>; + data2 = <&pio33 1 ALT1 IN>; + data3 = <&pio33 2 ALT1 IN>; + data4 = <&pio33 3 ALT1 IN>; + }; + }; + + pinctrl_i2s_2ch_in: i2s_2ch_in{ + st,pins { + mclk = <&pio32 5 ALT1 IN>; + lrclk = <&pio32 7 ALT1 IN>; + sclk = <&pio32 6 ALT1 IN>; + data0 = <&pio32 4 ALT1 IN>; + }; + }; + }; + serial3 { pinctrl_serial3: serial3-0 { st,pins {