From patchwork Mon Apr 18 15:09:44 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 66038 Delivered-To: patch@linaro.org Received: by 10.140.93.198 with SMTP id d64csp1340096qge; Mon, 18 Apr 2016 08:10:39 -0700 (PDT) X-Received: by 10.98.26.151 with SMTP id a145mr48380279pfa.46.1460992239449; Mon, 18 Apr 2016 08:10:39 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e18si4016560pag.116.2016.04.18.08.10.39; Mon, 18 Apr 2016 08:10:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752572AbcDRPKR (ORCPT + 29 others); Mon, 18 Apr 2016 11:10:17 -0400 Received: from mail-wm0-f43.google.com ([74.125.82.43]:35940 "EHLO mail-wm0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752260AbcDRPKK (ORCPT ); Mon, 18 Apr 2016 11:10:10 -0400 Received: by mail-wm0-f43.google.com with SMTP id v188so124162946wme.1 for ; Mon, 18 Apr 2016 08:10:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=eOKoWs7icDqP5i9vEtUp6EY0y8b8LaBKgEkNbARbrAg=; b=ZQjJoeOZ8LZ3hw+DD13UbACUF4rDzeygcVQU+D/X3FArr3zbe1MqaDm9qEd8uX3tnj 0GMQna0FXx7x8N7g3DFHyr08IJjJXstgAeFm0xNQi1NJJ3nanpDHGGjH7X+s+3k/Bx/c fBfOAZvtQYT0Osj4+T6aDmZxMSnpgwLLvqud0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=eOKoWs7icDqP5i9vEtUp6EY0y8b8LaBKgEkNbARbrAg=; b=VOie5GxwzF1+xoW+eD8bkVdAzXFxiCcwWW7rYVKRd/1up4cZCzIXfqZ4/Xsk6Q0fmk sfsfP8hLoLXP75xT0Pejt1RcF9VC9ZqzXbZMFT7BTxVUooGVGH+DK4sOpxNZFbtRYKYJ PjJS1mEuYrKauR6zIlkqXuTk0fSJjpcyMWU/RgGRs+NGtctH4mLLuwXCGG1/2BSGDFDd 10ZQmZdXDjqHlMj3xI6GKbppcwG2dVcIlQMvhKwz0mwyIUteG70If33n9AxX7/s3O7Tl 7YOEIXsKYS7GRR+Snibrjx70ZzQFAP+0jhWADQCbKChoE+Eu/jiSP1HTguMIvsH8sCxr J2hQ== X-Gm-Message-State: AOPr4FWlVxQ7XAbLhXnmM/CTUUvHT2AOQ0wORtj1dcxMtJJAMLK1ZhHRtCOhtLKsAypkJn82 X-Received: by 10.194.174.231 with SMTP id bv7mr36056071wjc.17.1460992209138; Mon, 18 Apr 2016 08:10:09 -0700 (PDT) Received: from localhost.localdomain ([195.55.142.58]) by smtp.gmail.com with ESMTPSA id b135sm54232075wmb.10.2016.04.18.08.10.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 18 Apr 2016 08:10:08 -0700 (PDT) From: Ard Biesheuvel To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, will.deacon@arm.com, mark.rutland@arm.com, james.morse@arm.com Cc: catalin.marinas@arm.com, Ard Biesheuvel Subject: [PATCH 4/8] arm64: introduce mov_q macro to move a constant into a 64-bit register Date: Mon, 18 Apr 2016 17:09:44 +0200 Message-Id: <1460992188-23295-5-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1460992188-23295-1-git-send-email-ard.biesheuvel@linaro.org> References: <1460992188-23295-1-git-send-email-ard.biesheuvel@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Implement a macro mov_q that can be used to move an immediate constant into a 64-bit register, using between 2 and 4 movz/movk instructions (depending on the operand) Signed-off-by: Ard Biesheuvel --- arch/arm64/include/asm/assembler.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) -- 2.5.0 diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index 70f7b9e04598..9ea846ded55c 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -233,4 +233,24 @@ lr .req x30 // link register .long \sym\()_hi32 .endm + /* + * mov_q - move an immediate constant into a 64-bit register using + * between 2 and 4 movz/movk instructions (depending on the + * magnitude and sign of the operand) + */ + .macro mov_q, reg, val + .if (((\val) >> 31) == 0 || ((\val) >> 31) == 0x1ffffffff) + movz \reg, :abs_g1_s:\val + .else + .if (((\val) >> 47) == 0 || ((\val) >> 47) == 0x1ffff) + movz \reg, :abs_g2_s:\val + .else + movz \reg, :abs_g3:\val + movk \reg, :abs_g2_nc:\val + .endif + movk \reg, :abs_g1_nc:\val + .endif + movk \reg, :abs_g0_nc:\val + .endm + #endif /* __ASM_ASSEMBLER_H */