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[92.17.247.99]) by smtp.gmail.com with ESMTPSA id gt7sm32431907wjc.1.2016.04.12.02.34.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 12 Apr 2016 02:34:46 -0700 (PDT) From: Srinivas Kandagatla To: Andy Gross , linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-soc@vger.kernel.org, srinivas.kandagatla@linaro.org Subject: [PATCH v2 08/13] ARM: dts: db600c: add pcie support Date: Tue, 12 Apr 2016 10:33:57 +0100 Message-Id: <1460453642-5809-9-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1460453642-5809-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1460453642-5809-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds pcie and regulators required to get on board ATL1C ethernet working. Signed-off-by: Srinivas Kandagatla Acked-by: Bjorn Andersson --- .../boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi | 12 +++++++++++ arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts | 24 ++++++++++++++++++++++ 2 files changed, 36 insertions(+) -- 2.5.0 diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi index 7339919..0610f00 100644 --- a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi @@ -6,4 +6,16 @@ bias-disable; }; }; + + pcie_pins: pcie-pinmux { + mux { + pins = "gpio27"; + function = "gpio"; + }; + conf { + pins = "gpio27"; + drive-strength = <12>; + bias-disable; + }; + }; }; diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts index 2c563df..4f2218c 100644 --- a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts +++ b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts @@ -21,6 +21,16 @@ regulator-type = "voltage"; regulator-boot-on; }; + + /* on board fixed 3.3v supply */ + vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; soc { @@ -109,6 +119,10 @@ regulator-max-microvolt = <1900000>; bias-pull-down; }; + + lvs6 { + bias-pull-down; + }; }; }; @@ -135,6 +149,16 @@ }; }; + pci@1b500000 { + status = "okay"; + vdda-supply = <&pm8921_s3>; + vdda_phy-supply = <&pm8921_lvs6>; + vdda_refclk-supply = <&vcc3v3>; + pinctrl-0 = <&pcie_pins>; + pinctrl-names = "default"; + perst-gpio = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>; + }; + /* OTG */ phy@12500000 { status = "okay";