From patchwork Thu Apr 7 12:03:26 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shannon Zhao X-Patchwork-Id: 65307 Delivered-To: patch@linaro.org Received: by 10.112.43.237 with SMTP id z13csp35175lbl; Thu, 7 Apr 2016 05:07:48 -0700 (PDT) X-Received: by 10.66.232.226 with SMTP id tr2mr1623671pac.44.1460030868539; Thu, 07 Apr 2016 05:07:48 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e72si516708pfb.126.2016.04.07.05.07.48; Thu, 07 Apr 2016 05:07:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756302AbcDGMHq (ORCPT + 29 others); Thu, 7 Apr 2016 08:07:46 -0400 Received: from szxga03-in.huawei.com ([119.145.14.66]:28818 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755758AbcDGME2 (ORCPT ); Thu, 7 Apr 2016 08:04:28 -0400 Received: from 172.24.1.136 (EHLO SZXEML424-HUB.china.huawei.com) ([172.24.1.136]) by szxrg03-dlp.huawei.com (MOS 4.4.3-GA FastPath queued) with ESMTP id BZL25442; Thu, 07 Apr 2016 20:04:23 +0800 (CST) Received: from HGHY1Z002260041.china.huawei.com (10.177.16.142) by SZXEML424-HUB.china.huawei.com (10.82.67.153) with Microsoft SMTP Server id 14.3.235.1; Thu, 7 Apr 2016 20:04:13 +0800 From: Shannon Zhao To: , CC: , , , , , , , , , Subject: [PATCH v11 09/17] xen/hvm/params: Add a new delivery type for event-channel in HVM_PARAM_CALLBACK_IRQ Date: Thu, 7 Apr 2016 20:03:26 +0800 Message-ID: <1460030614-16112-10-git-send-email-zhaoshenglong@huawei.com> X-Mailer: git-send-email 1.9.0.msysgit.0 In-Reply-To: <1460030614-16112-1-git-send-email-zhaoshenglong@huawei.com> References: <1460030614-16112-1-git-send-email-zhaoshenglong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.16.142] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090205.57064CC7.00D6, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 1daae312066b4750bce6ee6cc58e19b1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Shannon Zhao This new delivery type which is for ARM shares the same value with HVM_PARAM_CALLBACK_TYPE_VECTOR which is for x86. val[15:8] is flag: val[7:0] is a PPI. To the flag, bit 8 stands the interrupt mode is edge(1) or level(0) and bit 9 stands the interrupt polarity is active low(1) or high(0). Signed-off-by: Shannon Zhao Acked-by: Stefano Stabellini Reviewed-by: Julien Grall --- include/xen/interface/hvm/params.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 2.0.4 diff --git a/include/xen/interface/hvm/params.h b/include/xen/interface/hvm/params.h index 70ad208..4d61fc5 100644 --- a/include/xen/interface/hvm/params.h +++ b/include/xen/interface/hvm/params.h @@ -47,11 +47,24 @@ * Domain = val[47:32], Bus = val[31:16] DevFn = val[15:8], IntX = val[1:0] */ +#if defined(__i386__) || defined(__x86_64__) #define HVM_PARAM_CALLBACK_TYPE_VECTOR 2 /* * val[7:0] is a vector number. Check for XENFEAT_hvm_callback_vector to know * if this delivery method is available. */ +#elif defined(__arm__) || defined(__aarch64__) +#define HVM_PARAM_CALLBACK_TYPE_PPI 2 +/* + * val[55:16] needs to be zero. + * val[15:8] is interrupt flag of the PPI used by event-channel: + * bit 8: the PPI is edge(1) or level(0) triggered + * bit 9: the PPI is active low(1) or high(0) + * val[7:0] is a PPI number used by event-channel. + * This is only used by ARM/ARM64 and masking/eoi the interrupt associated to + * the notification is handled by the interrupt controller. + */ +#endif #define HVM_PARAM_STORE_PFN 1 #define HVM_PARAM_STORE_EVTCHN 2