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[209.132.180.67]) by mx.google.com with ESMTP id ah8si7863401pad.148.2016.04.05.06.31.33; Tue, 05 Apr 2016 06:31:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933301AbcDENb1 (ORCPT + 29 others); Tue, 5 Apr 2016 09:31:27 -0400 Received: from mail-pa0-f43.google.com ([209.85.220.43]:34643 "EHLO mail-pa0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933252AbcDENbX (ORCPT ); Tue, 5 Apr 2016 09:31:23 -0400 Received: by mail-pa0-f43.google.com with SMTP id fe3so10881306pab.1 for ; Tue, 05 Apr 2016 06:31:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kHhQndYy2woCk7VKNg91mgZaFN7rLvTuZaTw3f4M/zo=; b=OV+Mz5bpVEvDu3FDcAgbvWU3P7SfkrYuUIGymOLbJAnttUXt3f5fwS+1oclbprv3my B3Tv/z1Y2BCyCVOYOj600BCVjY8Yo0E6EXCbmWMVrSOj6q+JSu9/8UN94tBLxhWkup8C EMWwcJIhD47R+eaK2Xe8e01+PUizkBU3j1tO0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kHhQndYy2woCk7VKNg91mgZaFN7rLvTuZaTw3f4M/zo=; b=H3LVm3OR7mvrCekdO5YkCCuqcJKXhPvOqkBg4m7wDoQFd/Kblec3vGa2QRxmisjU2c uRZLGvRGz+/Bj2aYlDy9517WpPixQC3yUlwaKTycY3dtmxhP2LSABWFLjQIe2x7uAEx9 DRIBjcDC7zacmvb41NlTFotSC+6az761AL9WHQnGKfLPxAE9K5MXWuLbHB8tmLWoSavw leXHtJFHNMMUygsc9F0qcd0sIxnr9yUBG4z2RKIC6UFy/U37gWCXAdUoV88melPATaj8 I3U6wFSHYLP5EWkbWht3N+xrYZmFzpZjkLN2++X/xzFmqjnBknYlVEE4xz3AKwKENVHp yPAw== X-Gm-Message-State: AD7BkJJgg/NUFAPfenFiKD5uMaXbABoZUejTUtBPOYr7dTJR1paswxcEqyoQn0OlLPTsmvvE X-Received: by 10.66.189.166 with SMTP id gj6mr62301710pac.158.1459863082731; Tue, 05 Apr 2016 06:31:22 -0700 (PDT) Received: from localhost.localdomain ([45.56.152.49]) by smtp.gmail.com with ESMTPSA id wh9sm8060481pab.8.2016.04.05.06.31.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 05 Apr 2016 06:31:21 -0700 (PDT) From: Guodong Xu To: xuwei5@hisilicon.com, mark.rutland@arm.com, robh@kernel.org, grant.likely@secretlab.ca, linus.walleij@linaro.org, arnd.bergmann@linaro.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kong.kongxinwei@hisilicon.com, Chen Feng , Fei Wang Subject: [PATCH v3 14/16] arm64: dts: hikey: Add hi655x pmic dts node Date: Tue, 5 Apr 2016 21:27:38 +0800 Message-Id: <1459862860-9775-15-git-send-email-guodong.xu@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1459862860-9775-1-git-send-email-guodong.xu@linaro.org> References: <1459862860-9775-1-git-send-email-guodong.xu@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Chen Feng Add the mfd hi655x dts node and regulator support on hi6220 platform. Signed-off-by: Chen Feng Signed-off-by: Fei Wang Signed-off-by: Xinwei Kong Reviewed-by: Haojian Zhuang Reviewed-by: Guodong Xu Acked-by: Lee Jones --- arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 87 ++++++++++++++++++++++++++ 1 file changed, 87 insertions(+) -- 1.9.1 diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts index 28bc646..a6dffa8 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts +++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts @@ -6,6 +6,7 @@ */ /dts-v1/; +#include #include "hi6220.dtsi" #include "hikey-gpio.dtsi" @@ -104,6 +105,92 @@ default-state = "off"; }; }; + + pmic: pmic@f8000000 { + compatible = "hisilicon,hi655x-pmic"; + reg = <0x0 0xf8000000 0x0 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + status = "okay"; + + regulators { + ldo2: LDO2@a21 { + regulator-name = "LDO2_2V8"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3200000>; + regulator-enable-ramp-delay = <120>; + }; + + ldo7: LDO7@a26 { + regulator-name = "LDO7_SDIO"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <120>; + }; + + ldo10: LDO10@a29 { + regulator-name = "LDO10_2V85"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + regulator-enable-ramp-delay = <360>; + }; + + ldo13: LDO13@a32 { + regulator-name = "LDO13_1V8"; + regulator-min-microvolt = <1600000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <120>; + }; + + ldo14: LDO14@a33 { + regulator-name = "LDO14_2V8"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3200000>; + regulator-enable-ramp-delay = <120>; + }; + + ldo15: LDO15@a34 { + regulator-name = "LDO15_1V8"; + regulator-min-microvolt = <1600000>; + regulator-max-microvolt = <1950000>; + regulator-boot-on; + regulator-always-on; + regulator-enable-ramp-delay = <120>; + }; + + ldo17: LDO17@a36 { + regulator-name = "LDO17_2V5"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3200000>; + regulator-enable-ramp-delay = <120>; + }; + + ldo19: LDO19@a38 { + regulator-name = "LDO19_3V0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + regulator-enable-ramp-delay = <360>; + }; + + ldo21: LDO21@a40 { + regulator-name = "LDO21_1V8"; + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <2000000>; + regulator-always-on; + regulator-enable-ramp-delay = <120>; + }; + + ldo22: LDO22@a41 { + regulator-name = "LDO22_1V2"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + regulator-always-on; + regulator-enable-ramp-delay = <120>; + }; + }; + }; }; &uart2 {