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[209.132.180.67]) by mx.google.com with ESMTP id v8si26752442pfi.16.2016.04.02.02.32.09; Sat, 02 Apr 2016 02:32:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754075AbcDBJcA (ORCPT + 29 others); Sat, 2 Apr 2016 05:32:00 -0400 Received: from mail-pf0-f176.google.com ([209.85.192.176]:35326 "EHLO mail-pf0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753958AbcDBJb5 (ORCPT ); Sat, 2 Apr 2016 05:31:57 -0400 Received: by mail-pf0-f176.google.com with SMTP id n1so3544473pfn.2 for ; Sat, 02 Apr 2016 02:31:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=mT7R4sEvJ8kxiS9FOzQwz+TVSd9KvGcTfK09yEWCG/4=; b=AzRKsDCUbEofolb35baX/ap0cxY2q9gYgL/2u1vu8M4kMI6lCcSR8CILLz+JHfwyil IsiHL3KLH3QRTJ6KG+4SbyVQ1uTvgIwwq4yrU+KWNGSJ/ZN4QakpTsMvGf/qM3NgP8v0 lpIP+7DNGxzr8v2MpttVNwvpg7eVRwPXqV4mk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=mT7R4sEvJ8kxiS9FOzQwz+TVSd9KvGcTfK09yEWCG/4=; b=HpjJC8dj1ITLIp1rMKY9tTj8xq8mWV1qP24yaofcFU/ZM3iQJBZARidlDw+J7dmvjA ykBGVPRPHR18xPUhBV7xDhafNER7lTeZvW16eUhiowRvun8d2EomGhgtS2+85eluHHpp 7o8d3tTYJcgC2tBTL1HkLK7jrqwOZZs162NUoier/aUdAx6yArdrz/ip275u5K5ux+2c vhl3OQmDZBYrraLkYl6XAoNp6ML/U5/q2RHOOdkrzLtPUtyFlnE5V48YURNgWbHQNAW1 5gFcACk7h+dZdQtZ5Zo4RgXYUqvEIlRJfAYFBu1WbTDhRPcvajtfB2OHunM7nhxFGyib qGYw== X-Gm-Message-State: AD7BkJKD+YRNEtZOwPPFg+LAgW56IoTcjomTFWrJWdTB4EUzaxBzvrODkKLmmLf0uSWd2aKW X-Received: by 10.98.74.200 with SMTP id c69mr4957771pfj.129.1459589516633; Sat, 02 Apr 2016 02:31:56 -0700 (PDT) Received: from localhost.localdomain ([104.237.91.92]) by smtp.gmail.com with ESMTPSA id i9sm25425804pfi.95.2016.04.02.02.31.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 02 Apr 2016 02:31:56 -0700 (PDT) From: Guodong Xu To: xuwei5@hisilicon.com, mark.rutland@arm.com, robh@kernel.org, grant.likely@secretlab.ca, linus.walleij@linaro.org, arnd.bergmann@linaro.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kong.kongxinwei@hisilicon.com, Chen Feng , Fei Wang Subject: [PATCH v2 14/16] arm64: dts: hikey: Add hi655x pmic dts node Date: Sat, 2 Apr 2016 17:29:41 +0800 Message-Id: <1459589383-16914-15-git-send-email-guodong.xu@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1459589383-16914-1-git-send-email-guodong.xu@linaro.org> References: <1459589383-16914-1-git-send-email-guodong.xu@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Chen Feng Add the mfd hi655x dts node and regulator support on hi6220 platform. Signed-off-by: Chen Feng Signed-off-by: Fei Wang Signed-off-by: Xinwei Kong Reviewed-by: Haojian Zhuang Reviewed-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 87 ++++++++++++++++++++++++++ 1 file changed, 87 insertions(+) -- 1.9.1 diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts index 28bc646..a6dffa8 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts +++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts @@ -6,6 +6,7 @@ */ /dts-v1/; +#include #include "hi6220.dtsi" #include "hikey-gpio.dtsi" @@ -104,6 +105,92 @@ default-state = "off"; }; }; + + pmic: pmic@f8000000 { + compatible = "hisilicon,hi655x-pmic"; + reg = <0x0 0xf8000000 0x0 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + status = "okay"; + + regulators { + ldo2: LDO2@a21 { + regulator-name = "LDO2_2V8"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3200000>; + regulator-enable-ramp-delay = <120>; + }; + + ldo7: LDO7@a26 { + regulator-name = "LDO7_SDIO"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <120>; + }; + + ldo10: LDO10@a29 { + regulator-name = "LDO10_2V85"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + regulator-enable-ramp-delay = <360>; + }; + + ldo13: LDO13@a32 { + regulator-name = "LDO13_1V8"; + regulator-min-microvolt = <1600000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <120>; + }; + + ldo14: LDO14@a33 { + regulator-name = "LDO14_2V8"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3200000>; + regulator-enable-ramp-delay = <120>; + }; + + ldo15: LDO15@a34 { + regulator-name = "LDO15_1V8"; + regulator-min-microvolt = <1600000>; + regulator-max-microvolt = <1950000>; + regulator-boot-on; + regulator-always-on; + regulator-enable-ramp-delay = <120>; + }; + + ldo17: LDO17@a36 { + regulator-name = "LDO17_2V5"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3200000>; + regulator-enable-ramp-delay = <120>; + }; + + ldo19: LDO19@a38 { + regulator-name = "LDO19_3V0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + regulator-enable-ramp-delay = <360>; + }; + + ldo21: LDO21@a40 { + regulator-name = "LDO21_1V8"; + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <2000000>; + regulator-always-on; + regulator-enable-ramp-delay = <120>; + }; + + ldo22: LDO22@a41 { + regulator-name = "LDO22_1V2"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + regulator-always-on; + regulator-enable-ramp-delay = <120>; + }; + }; + }; }; &uart2 {