From patchwork Tue Feb 23 16:50:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 62744 Delivered-To: patch@linaro.org Received: by 10.112.43.199 with SMTP id y7csp1933156lbl; Tue, 23 Feb 2016 08:50:46 -0800 (PST) X-Received: by 10.98.93.211 with SMTP id n80mr48045553pfj.61.1456246246148; Tue, 23 Feb 2016 08:50:46 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id tx10si48297982pac.146.2016.02.23.08.50.45; Tue, 23 Feb 2016 08:50:46 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dkim=pass header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754683AbcBWQuo (ORCPT + 30 others); Tue, 23 Feb 2016 11:50:44 -0500 Received: from mail-wm0-f45.google.com ([74.125.82.45]:38880 "EHLO mail-wm0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752906AbcBWQuk (ORCPT ); Tue, 23 Feb 2016 11:50:40 -0500 Received: by mail-wm0-f45.google.com with SMTP id a4so217974019wme.1 for ; Tue, 23 Feb 2016 08:50:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=K1onN2/RQeOjEr1t5L0MsbFjSDh+6eepFUmFeJzNGn0=; b=HPlHM/HdqjK3prF2eSyavRyvu37+/V/JQBTCYlMvuk9fnozdIkWwXHWFJLC9bZbgWq gPrJxw1NQv/jbAu7vU/lQ0DT0OoHLWzASITJ9BggE9uktQ8z3pFUSCmxPB9NpjnriHqm qxgEJJCUY9aPrYVd3za+5nRXyIXTWiB+RVV2c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=K1onN2/RQeOjEr1t5L0MsbFjSDh+6eepFUmFeJzNGn0=; b=H+kbvkQhxApGMc+7W+k/wRituvttt9uicMYrIV40gtXvDRPZDNUjKYW6F8ef6ppEnm k5Kb80/j5CgI8F9eFo8079gG5CyAUYW+cMBipAoSJc4GCoHxI8oMp11IBVn/WHFwEM02 lzFwMblV/TjbUCeO+Y5JoAMH2ff1K70e6QtvgEjKRD1zAPQJsbBDKEWo0+BpOq7lkyk1 kx4fG6qtQPXYiQ6iRQT8u0k5wbFfYPe45SkNyM2YkgTjjdu7DbuN3GTsTMWWgcAPyvOz h0JdvMtHTZc0JC8KQJJQoYOt8HzU36XQOcAj6vUISX9X3H3GDRteViBhxOc/5ePJmjlT xi+Q== X-Gm-Message-State: AG10YOTZB3LPohzCqRSezpja4LtitIosRvxUih6dmVRsaKO3Ni/a46MXuP3DMTt/KrZba6G3 X-Received: by 10.28.109.141 with SMTP id b13mr18245567wmi.25.1456246239694; Tue, 23 Feb 2016 08:50:39 -0800 (PST) Received: from localhost.localdomain (host-92-17-247-99.as13285.net. [92.17.247.99]) by smtp.gmail.com with ESMTPSA id k8sm19286174wjr.38.2016.02.23.08.50.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 23 Feb 2016 08:50:38 -0800 (PST) From: Srinivas Kandagatla To: Andy Gross , linux-arm-msm@vger.kernel.org Cc: Rob Herring , Russell King , linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v3 6/8] arm64: dts: qcom: fix usb digital voltage levels Date: Tue, 23 Feb 2016 16:50:36 +0000 Message-Id: <1456246236-18341-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1456246153-18087-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1456246153-18087-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch updates the digital voltage levels from corner values to microvolts as we are going to use s1 regulator directly for vddcx instead of s1_corner. Signed-off-by: Srinivas Kandagatla --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 1.9.1 diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index a6fddce..2f40fdd 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -421,7 +421,7 @@ interrupts = , ; - qcom,vdd-levels = <1 5 7>; + qcom,vdd-levels = <500000 1000000 1320000>; qcom,phy-init-sequence = <0x44 0x6B 0x24 0x13>; dr_mode = "peripheral"; qcom,otg-control = <2>; // PMIC