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[209.132.180.67]) by mx.google.com with ESMTP id ua2si22302030pac.51.2016.02.22.06.02.32; Mon, 22 Feb 2016 06:02:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dkim=pass header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932088AbcBVOCX (ORCPT + 30 others); Mon, 22 Feb 2016 09:02:23 -0500 Received: from mail-wm0-f47.google.com ([74.125.82.47]:33351 "EHLO mail-wm0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755138AbcBVOCU (ORCPT ); Mon, 22 Feb 2016 09:02:20 -0500 Received: by mail-wm0-f47.google.com with SMTP id g62so158269173wme.0 for ; Mon, 22 Feb 2016 06:02:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=iW18jnbHiv1XzgQeELwWF3Wupt4Cin/435YkrYB4y5Q=; b=L1eFd3AQ5RfMfNn7jOW7N5MZC+h57SXmLgfBT0H6295ufKehCXj4kY6dxZ8yfMZFXB hdFwzqirsPzA7xa+EBfQBy6lEc7iLG4c6PJtEpULiFr7lQZHJwM/rPjCxbanpPakJrGl gsr2MSc3xPigigbJFLZhZzbHGl/NiFzmygeTI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=iW18jnbHiv1XzgQeELwWF3Wupt4Cin/435YkrYB4y5Q=; b=lyXFdMbIoxmmBZTqT+oJ/bi8b5jxwJmg7QXl+cNq+E4m5MLS4Za/68HUNPO4i6UXM/ RuJMy6caD0OASQTda87qojNajxCMXsU7V1KpuiUjUQc6/2X/xm3smAQbP3pAn/mVj7E6 HaZdJ+tNqCkk0qUHuHzSkUXNt7CT0ruarJ/fENAwtG5LENpiiuHbb8qi3feZ2WqExnNW 8IMYOL/J9+wkKKWsPbjpm6sLSxi4pH8X4y7haVIbiOOyNhv2DPBuBdEzd8o2OjzFMVhj ZOsQDXf5HtHJTS1fDUL7ydoq8WCHU0Vs511UbR1n5q2s9nBxTFXnPFA9ynp93NvqGLPy thnw== X-Gm-Message-State: AG10YOQxyDgm+5lK83mbpBginKNDADWZmx9cAc9unGZITtsNQ23GifClhUDScanLTk02wOzH X-Received: by 10.194.92.107 with SMTP id cl11mr32762061wjb.21.1456149737979; Mon, 22 Feb 2016 06:02:17 -0800 (PST) Received: from localhost.localdomain ([195.55.142.58]) by smtp.gmail.com with ESMTPSA id b5sm21269068wmh.15.2016.02.22.06.02.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 22 Feb 2016 06:02:17 -0800 (PST) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux@arm.linux.org.uk, dan.j.williams@intel.com Cc: arnd@arndb.de, nico@linaro.org, Ard Biesheuvel , Russell King Subject: [RFC PATCH 2/2] ARM: memremap: implement arch_memremap_wb() Date: Mon, 22 Feb 2016 15:02:08 +0100 Message-Id: <1456149728-16706-3-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1456149728-16706-1-git-send-email-ard.biesheuvel@linaro.org> References: <1456149728-16706-1-git-send-email-ard.biesheuvel@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The generic memremap() falls back to using ioremap_cache() to create MEMREMAP_WB mappings if the requested region is not already covered by the linear mapping, unless the architecture provides an implementation of arch_memremap_wb(). Since ioremap_cache() is not appropriate on ARM to map memory with the same attributes used for the linear mapping, implement arch_memremap_wb() which does exactly that. Also, relax the WARN() check to allow MT_MEMORY_RW mappings of pfn_valid() pages. Cc: Russell King Signed-off-by: Ard Biesheuvel --- arch/arm/include/asm/io.h | 3 +++ arch/arm/mm/ioremap.c | 11 +++++++++-- 2 files changed, 12 insertions(+), 2 deletions(-) -- 2.5.0 diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 485982084fe9..7456638e6b3a 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -402,6 +402,9 @@ void __iomem *ioremap_wc(resource_size_t res_cookie, size_t size); void iounmap(volatile void __iomem *iomem_cookie); #define iounmap iounmap +void *arch_memremap_wb(phys_addr_t phys_addr, size_t size); +#define arch_memremap_wb arch_memremap_wb + /* * io{read,write}{16,32}be() macros */ diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index 66a978d05958..d3a2b028c614 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c @@ -297,9 +297,10 @@ static void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn, } /* - * Don't allow RAM to be mapped - this causes problems with ARMv6+ + * Don't allow RAM to be mapped with mismatched attributes - this + * causes problems with ARMv6+ */ - if (WARN_ON(pfn_valid(pfn))) + if (WARN_ON(pfn_valid(pfn) && mtype != MT_MEMORY_RW)) return NULL; area = get_vm_area_caller(size, VM_IOREMAP, caller); @@ -414,6 +415,12 @@ __arm_ioremap_exec(phys_addr_t phys_addr, size_t size, bool cached) __builtin_return_address(0)); } +void *arch_memremap_wb(phys_addr_t phys_addr, size_t size) +{ + return __arm_ioremap_caller(phys_addr, size, MT_MEMORY_RW, + __builtin_return_address(0)); +} + void __iounmap(volatile void __iomem *io_addr) { void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr);