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8bytes.org; dmarc=none action=none header.from=amd.com; Received: from localhost.localdomain (58.10.104.205) by BLUPR12MB0434.namprd12.prod.outlook.com (10.162.92.14) with Microsoft SMTP Server (TLS) id 15.1.403.16; Tue, 9 Feb 2016 22:54:22 +0000 From: Suravee Suthikulpanit To: , , , , CC: , , , Suravee Suthikulpanit Subject: [PATCH V3 1/5] perf/amd/iommu: Consolidate and move perf_event_amd_iommu header Date: Tue, 9 Feb 2016 16:53:51 -0600 Message-ID: <1455058435-8716-2-git-send-email-Suravee.Suthikulpanit@amd.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1455058435-8716-1-git-send-email-Suravee.Suthikulpanit@amd.com> References: <1455058435-8716-1-git-send-email-Suravee.Suthikulpanit@amd.com> MIME-Version: 1.0 X-Originating-IP: [58.10.104.205] X-ClientProxiedBy: SG2PR03CA0004.apcprd03.prod.outlook.com (25.160.233.14) To BLUPR12MB0434.namprd12.prod.outlook.com (25.162.92.14) X-MS-Office365-Filtering-Correlation-Id: 2575341a-045c-4393-d5cd-08d331a3f586 X-Microsoft-Exchange-Diagnostics: 1; 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BLUPR12MB0434; 5:mq2jnn970xElD446rP1KQktNaeq0j2rdSHA+vurMKf4VS5Y/RAwfcaK4+fLhy1Kx9wabCArDGCyYYZRYenR6/p8swIxoIeQHfOC2e00laNaIiqhsp3f/N3+2v5Rklxr2o8reTb26t7+uIAA4OSGgOg==; 24:9+aa5Y2usYIoTkeNEm8R4U8UVQLyV1xwegwkLC0q8D/3nEvvroIqSZHASLQ/KuB6MZm6NgPzp9gNJEvDFi8KiUpCPOsx3XLnrlUcG3TcEso=; 20:/CnbPmRoY28vYnaX9QVmWvNXz/edr+MqoPeeQ/NkUx5OaMWXJ3mdwH62qExYrMxaRhDJQygH467n04gVgKIvFdVSgnhK4f+y1cImv28FTu1aqOAKDDphFercZDVRYJ3/ZuOv0I6UhZTPcDNQhhwRjZV0glNofCgAfhsQ6DVofKAXI0AFg3Aw1P5DJ4XGnaPJ5MWOKMGjjDEGGD19NQouNfZFzQzjldESEgy70cL4QTmp1VVZUZvCYmMzhx/xY3RU X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2016 22:54:22.5243 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLUPR12MB0434 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch consolidates "arch/x86/kernel/cpu/perf_event_amd_iommu.h" and "drivers/iommu/amd_iommu_proto.h", which contain duplicate function declarations, into "include/linux/perf/perf_event_amd_iommu.h" Reviewed-by: Joerg Roedel Signed-off-by: Suravee Suthikulpanit --- arch/x86/kernel/cpu/perf_event_amd_iommu.c | 2 +- arch/x86/kernel/cpu/perf_event_amd_iommu.h | 40 ------------------------------ drivers/iommu/amd_iommu_init.c | 2 ++ drivers/iommu/amd_iommu_proto.h | 7 ------ include/linux/perf/perf_event_amd_iommu.h | 40 ++++++++++++++++++++++++++++++ 5 files changed, 43 insertions(+), 48 deletions(-) delete mode 100644 arch/x86/kernel/cpu/perf_event_amd_iommu.h create mode 100644 include/linux/perf/perf_event_amd_iommu.h -- 2.5.0 diff --git a/arch/x86/kernel/cpu/perf_event_amd_iommu.c b/arch/x86/kernel/cpu/perf_event_amd_iommu.c index 97242a9..d44525e 100644 --- a/arch/x86/kernel/cpu/perf_event_amd_iommu.c +++ b/arch/x86/kernel/cpu/perf_event_amd_iommu.c @@ -12,12 +12,12 @@ */ #include +#include #include #include #include #include "perf_event.h" -#include "perf_event_amd_iommu.h" #define COUNTER_SHIFT 16 diff --git a/arch/x86/kernel/cpu/perf_event_amd_iommu.h b/arch/x86/kernel/cpu/perf_event_amd_iommu.h deleted file mode 100644 index 845d173..0000000 --- a/arch/x86/kernel/cpu/perf_event_amd_iommu.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Copyright (C) 2013 Advanced Micro Devices, Inc. - * - * Author: Steven Kinney - * Author: Suravee Suthikulpanit - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _PERF_EVENT_AMD_IOMMU_H_ -#define _PERF_EVENT_AMD_IOMMU_H_ - -/* iommu pc mmio region register indexes */ -#define IOMMU_PC_COUNTER_REG 0x00 -#define IOMMU_PC_COUNTER_SRC_REG 0x08 -#define IOMMU_PC_PASID_MATCH_REG 0x10 -#define IOMMU_PC_DOMID_MATCH_REG 0x18 -#define IOMMU_PC_DEVID_MATCH_REG 0x20 -#define IOMMU_PC_COUNTER_REPORT_REG 0x28 - -/* maximun specified bank/counters */ -#define PC_MAX_SPEC_BNKS 64 -#define PC_MAX_SPEC_CNTRS 16 - -/* iommu pc reg masks*/ -#define IOMMU_BASE_DEVID 0x0000 - -/* amd_iommu_init.c external support functions */ -extern bool amd_iommu_pc_supported(void); - -extern u8 amd_iommu_pc_get_max_banks(u16 devid); - -extern u8 amd_iommu_pc_get_max_counters(u16 devid); - -extern int amd_iommu_pc_get_set_reg_val(u16 devid, u8 bank, u8 cntr, - u8 fxn, u64 *value, bool is_write); - -#endif /*_PERF_EVENT_AMD_IOMMU_H_*/ diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c index 013bdff..b6d684c 100644 --- a/drivers/iommu/amd_iommu_init.c +++ b/drivers/iommu/amd_iommu_init.c @@ -27,6 +27,8 @@ #include #include #include +#include + #include #include #include diff --git a/drivers/iommu/amd_iommu_proto.h b/drivers/iommu/amd_iommu_proto.h index 0bd9eb3..ac2da91 100644 --- a/drivers/iommu/amd_iommu_proto.h +++ b/drivers/iommu/amd_iommu_proto.h @@ -55,13 +55,6 @@ extern int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid, extern int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid); extern struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev); -/* IOMMU Performance Counter functions */ -extern bool amd_iommu_pc_supported(void); -extern u8 amd_iommu_pc_get_max_banks(u16 devid); -extern u8 amd_iommu_pc_get_max_counters(u16 devid); -extern int amd_iommu_pc_get_set_reg_val(u16 devid, u8 bank, u8 cntr, u8 fxn, - u64 *value, bool is_write); - #ifdef CONFIG_IRQ_REMAP extern int amd_iommu_create_irq_domain(struct amd_iommu *iommu); #else diff --git a/include/linux/perf/perf_event_amd_iommu.h b/include/linux/perf/perf_event_amd_iommu.h new file mode 100644 index 0000000..845d173 --- /dev/null +++ b/include/linux/perf/perf_event_amd_iommu.h @@ -0,0 +1,40 @@ +/* + * Copyright (C) 2013 Advanced Micro Devices, Inc. + * + * Author: Steven Kinney + * Author: Suravee Suthikulpanit + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _PERF_EVENT_AMD_IOMMU_H_ +#define _PERF_EVENT_AMD_IOMMU_H_ + +/* iommu pc mmio region register indexes */ +#define IOMMU_PC_COUNTER_REG 0x00 +#define IOMMU_PC_COUNTER_SRC_REG 0x08 +#define IOMMU_PC_PASID_MATCH_REG 0x10 +#define IOMMU_PC_DOMID_MATCH_REG 0x18 +#define IOMMU_PC_DEVID_MATCH_REG 0x20 +#define IOMMU_PC_COUNTER_REPORT_REG 0x28 + +/* maximun specified bank/counters */ +#define PC_MAX_SPEC_BNKS 64 +#define PC_MAX_SPEC_CNTRS 16 + +/* iommu pc reg masks*/ +#define IOMMU_BASE_DEVID 0x0000 + +/* amd_iommu_init.c external support functions */ +extern bool amd_iommu_pc_supported(void); + +extern u8 amd_iommu_pc_get_max_banks(u16 devid); + +extern u8 amd_iommu_pc_get_max_counters(u16 devid); + +extern int amd_iommu_pc_get_set_reg_val(u16 devid, u8 bank, u8 cntr, + u8 fxn, u64 *value, bool is_write); + +#endif /*_PERF_EVENT_AMD_IOMMU_H_*/