From patchwork Wed Feb 3 18:39:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 61136 Delivered-To: patch@linaro.org Received: by 10.112.43.199 with SMTP id y7csp19052lbl; Wed, 3 Feb 2016 10:51:49 -0800 (PST) X-Received: by 10.66.141.71 with SMTP id rm7mr4720525pab.32.1454525508643; Wed, 03 Feb 2016 10:51:48 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r6si10735391pap.212.2016.02.03.10.51.48; Wed, 03 Feb 2016 10:51:48 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dkim=pass header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966081AbcBCSvq (ORCPT + 30 others); Wed, 3 Feb 2016 13:51:46 -0500 Received: from mail-pf0-f177.google.com ([209.85.192.177]:36427 "EHLO mail-pf0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965812AbcBCSjl (ORCPT ); Wed, 3 Feb 2016 13:39:41 -0500 Received: by mail-pf0-f177.google.com with SMTP id n128so17916949pfn.3 for ; Wed, 03 Feb 2016 10:39:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Rv31ERLyeja5E0RCzAX25yS8tgnrVQA4EAPOCabb6Oo=; b=Y7L7D+5n2qwSGeWk2REYjegwMR56PM+Q6MbQhU5YL+5vN26NAKifaxd/fQeYhrbxsw /r46UEuk/AeGyCT4kdoipMlGdwCRTWOYGiqiwykF40mn7lPxxRTEfDvLCgCLkXrKh9fk BukYKWcs911XYlnUttzSBcGPXCURbH72p/PII= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Rv31ERLyeja5E0RCzAX25yS8tgnrVQA4EAPOCabb6Oo=; b=RahOVaI+mKuXnp79zlSC81KyR4Lc2YIkgDDhm1FAuriL6XiyJ8zvg4uaYwcg+5WpVB oHgAchIPq8jygqUo6Ah3hXXUuRnCq4wnBTpQDzIrBmRU7v9p4i3YolTLeFtKytzKC89J RdZb8JlTgbHHXnYW5HOHMroNnRlMtZQtzKDW41oLoqWlMbSEopW5ggtqQ0BIk/88EQ1/ x+30yYFw7RGE7tW++nNNq8VKT3l5x2Zvk985Fy2ORO7+/avqSDjq3YbPZqaMbVCtksBh W2M29Jh+funKVJUVjZH+G063AWnGG/Zaejn0vWP2tRE7kd8DYMPg7+efuC0MHSlm0k/U yZOA== X-Gm-Message-State: AG10YOTuiDvQlyPnTIBX8pwRUb2C7E4WfsyCCgsDS1cuiHXbMCMZNGs+UDVfe4xq23EA2YhM X-Received: by 10.98.72.133 with SMTP id q5mr4622196pfi.166.1454524781247; Wed, 03 Feb 2016 10:39:41 -0800 (PST) Received: from t430.cg.shawcable.net ([184.64.168.246]) by smtp.gmail.com with ESMTPSA id xa9sm11369704pab.44.2016.02.03.10.39.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 03 Feb 2016 10:39:40 -0800 (PST) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, gregkh@linuxfoundation.org, zhang.chunyan@linaro.org, mike.leach@arm.com, alexander.shishkin@linux.intel.com, tor@ti.com Subject: [PATCH V9 04/18] coresight: etm3x: moving etm_readl/writel to header file Date: Wed, 3 Feb 2016 11:39:02 -0700 Message-Id: <1454524756-10628-5-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1454524756-10628-1-git-send-email-mathieu.poirier@linaro.org> References: <1454524756-10628-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Moving functions etm_readl/writel to file "coresight-etm.h" so that the main ETM3x driver can be split in more than one file. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm.h | 29 +++++++++++++++++++++++++++ drivers/hwtracing/coresight/coresight-etm3x.c | 29 --------------------------- 2 files changed, 29 insertions(+), 29 deletions(-) -- 2.1.4 diff --git a/drivers/hwtracing/coresight/coresight-etm.h b/drivers/hwtracing/coresight/coresight-etm.h index b4481eb29304..34f7db881fa7 100644 --- a/drivers/hwtracing/coresight/coresight-etm.h +++ b/drivers/hwtracing/coresight/coresight-etm.h @@ -251,4 +251,33 @@ enum etm_addr_type { ETM_ADDR_TYPE_START, ETM_ADDR_TYPE_STOP, }; + +static inline void etm_writel(struct etm_drvdata *drvdata, + u32 val, u32 off) +{ + if (drvdata->use_cp14) { + if (etm_writel_cp14(off, val)) { + dev_err(drvdata->dev, + "invalid CP14 access to ETM reg: %#x", off); + } + } else { + writel_relaxed(val, drvdata->base + off); + } +} + +static inline unsigned int etm_readl(struct etm_drvdata *drvdata, u32 off) +{ + u32 val; + + if (drvdata->use_cp14) { + if (etm_readl_cp14(off, &val)) { + dev_err(drvdata->dev, + "invalid CP14 access to ETM reg: %#x", off); + } + } else { + val = readl_relaxed(drvdata->base + off); + } + + return val; +} #endif diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index fe6791e0c66c..d53440e9af6f 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -42,35 +42,6 @@ module_param_named(boot_enable, boot_enable, int, S_IRUGO); static int etm_count; static struct etm_drvdata *etmdrvdata[NR_CPUS]; -static inline void etm_writel(struct etm_drvdata *drvdata, - u32 val, u32 off) -{ - if (drvdata->use_cp14) { - if (etm_writel_cp14(off, val)) { - dev_err(drvdata->dev, - "invalid CP14 access to ETM reg: %#x", off); - } - } else { - writel_relaxed(val, drvdata->base + off); - } -} - -static inline unsigned int etm_readl(struct etm_drvdata *drvdata, u32 off) -{ - u32 val; - - if (drvdata->use_cp14) { - if (etm_readl_cp14(off, &val)) { - dev_err(drvdata->dev, - "invalid CP14 access to ETM reg: %#x", off); - } - } else { - val = readl_relaxed(drvdata->base + off); - } - - return val; -} - /* * Memory mapped writes to clear os lock are not supported on some processors * and OS lock must be unlocked before any memory mapped access on such