From patchwork Wed Feb 3 18:39:12 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 61125 Delivered-To: patch@linaro.org Received: by 10.112.43.199 with SMTP id y7csp13460lbl; Wed, 3 Feb 2016 10:40:20 -0800 (PST) X-Received: by 10.66.162.164 with SMTP id yb4mr4591540pab.94.1454524820184; Wed, 03 Feb 2016 10:40:20 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 130si10802841pfb.3.2016.02.03.10.40.19; Wed, 03 Feb 2016 10:40:20 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dkim=pass header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933845AbcBCSkM (ORCPT + 30 others); Wed, 3 Feb 2016 13:40:12 -0500 Received: from mail-pa0-f54.google.com ([209.85.220.54]:35677 "EHLO mail-pa0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933781AbcBCSj7 (ORCPT ); Wed, 3 Feb 2016 13:39:59 -0500 Received: by mail-pa0-f54.google.com with SMTP id ho8so17578331pac.2 for ; Wed, 03 Feb 2016 10:39:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jmB0sByZADXmLCUmcF+mG1fP5fgqFGFiQuczmzc/rsk=; b=S+mXrXddV1tOO0aI7oGu10/G5QT/0Shv/ruCFIjG3eF8hczHFDQiqN4ZldckDcmGPc zezEC3MP1E7OaxVy1E/iRDPCS5er81i32D1JQVpHGULDKUyavWPDvrzsFpA4UCs29xAW L1nDDNEnU6AaMFFCjiNv51XvgDzOnCRWm+vOM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jmB0sByZADXmLCUmcF+mG1fP5fgqFGFiQuczmzc/rsk=; b=KMnq7Q+h829i2yKpUi9AHY+ty/jFjuU04fyrZMJOFviR7/jSZ4SoA1pQTrmoNtSSey NfPgRvwzx2d8P75vg931mJ0X/ASs5EmFGNcophebHcnrj0zILTMthDmwmSsYPeJFOH7I fqSiyYnzmjYEBoOaTq7YiTqJHEtMRQrHVe4jxkhPUbDuCKPYgRiCfk2CX2uZ9N9/SC50 eDJgMQR+6axeVi526dF81S9C3Dh3s6kRw8qKWqCWkMU3ksmuM7Q5l/a/spq0HUCLj4vu C80azZwnOJ8CytNiRvW6BvRs1xAV90czuxjy8rGY21gSS2mtSvRNqq1Nq5xfb15+l1/r 0Gbw== X-Gm-Message-State: AG10YOQ42DkhlK/mvx4b8DdsHitGe1MCP/8XBiif/dnHdWaEiVWeqBJl/LFdtSRysKsMNBA3 X-Received: by 10.66.150.202 with SMTP id uk10mr4496572pab.73.1454524798718; Wed, 03 Feb 2016 10:39:58 -0800 (PST) Received: from t430.cg.shawcable.net ([184.64.168.246]) by smtp.gmail.com with ESMTPSA id xa9sm11369704pab.44.2016.02.03.10.39.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 03 Feb 2016 10:39:58 -0800 (PST) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, gregkh@linuxfoundation.org, zhang.chunyan@linaro.org, mike.leach@arm.com, alexander.shishkin@linux.intel.com, tor@ti.com Subject: [PATCH V9 14/18] coresight: etb10: moving to local atomic operations Date: Wed, 3 Feb 2016 11:39:12 -0700 Message-Id: <1454524756-10628-15-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1454524756-10628-1-git-send-email-mathieu.poirier@linaro.org> References: <1454524756-10628-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Moving to use local atomic operations to take advantage of the lockless implementation, something that will come handy when the ETB is accessed from the Perf subsystem. Also changing the name of the variable to something more meaningful. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etb10.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) -- 2.1.4 diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c index 917562ecf82a..162c9ccc8c33 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -10,6 +10,7 @@ * GNU General Public License for more details. */ +#include #include #include #include @@ -71,7 +72,7 @@ * @csdev: component vitals needed by the framework. * @miscdev: specifics to handle "/dev/xyz.etb" entry. * @spinlock: only one at a time pls. - * @in_use: synchronise user space access to etb buffer. + * @reading: synchronise user space access to etb buffer. * @buf: area of memory where ETB buffer content gets sent. * @buffer_depth: size of @buf. * @enable: this ETB is being used. @@ -84,7 +85,7 @@ struct etb_drvdata { struct coresight_device *csdev; struct miscdevice miscdev; spinlock_t spinlock; - atomic_t in_use; + local_t reading; u8 *buf; u32 buffer_depth; bool enable; @@ -277,7 +278,7 @@ static int etb_open(struct inode *inode, struct file *file) struct etb_drvdata *drvdata = container_of(file->private_data, struct etb_drvdata, miscdev); - if (atomic_cmpxchg(&drvdata->in_use, 0, 1)) + if (local_cmpxchg(&drvdata->reading, 0, 1)) return -EBUSY; dev_dbg(drvdata->dev, "%s: successfully opened\n", __func__); @@ -313,7 +314,7 @@ static int etb_release(struct inode *inode, struct file *file) { struct etb_drvdata *drvdata = container_of(file->private_data, struct etb_drvdata, miscdev); - atomic_set(&drvdata->in_use, 0); + local_set(&drvdata->reading, 0); dev_dbg(drvdata->dev, "%s: released\n", __func__); return 0;