From patchwork Fri Jan 29 15:20:22 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Feng X-Patchwork-Id: 60797 Delivered-To: patch@linaro.org Received: by 10.112.130.2 with SMTP id oa2csp1185558lbb; Fri, 29 Jan 2016 07:28:24 -0800 (PST) X-Received: by 10.98.9.147 with SMTP id 19mr14201838pfj.163.1454081304104; Fri, 29 Jan 2016 07:28:24 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n5si24872465pfj.17.2016.01.29.07.28.23; Fri, 29 Jan 2016 07:28:24 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dkim=pass header.i=@foxmail.com; dmarc=pass (p=NONE dis=NONE) header.from=foxmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756546AbcA2P2W (ORCPT + 30 others); Fri, 29 Jan 2016 10:28:22 -0500 Received: from smtpbg303.qq.com ([184.105.206.26]:44903 "EHLO smtpbg303.qq.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756396AbcA2P2V (ORCPT ); Fri, 29 Jan 2016 10:28:21 -0500 X-Greylist: delayed 435 seconds by postgrey-1.27 at vger.kernel.org; Fri, 29 Jan 2016 10:28:21 EST DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foxmail.com; s=s201512; t=1454081299; bh=vLh0huacH+7P10NQUUhq3IgP9a+Pc9cqaH5qt8Oe73A=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=wTqCfv8NNyLyhpAGbhN3WplXe+teAYd1X1nfH43EdbBeZFQUgFyzmztVY8J5Ht/M7 HsKa8RPG85TYU9f4m3Pr+Xe304+V3m0XGGnRjgtWYgUxAIUiV134DOHWFke9Hs1mo4 GRUakgYSh3TlAZfdWLnxQXIqF36HtCyMM1EkeCS8= X-QQ-mid: esmtp23t1454080850t507t13358 Received: from localhost.localdomain (unknown [14.154.190.161]) by esmtp4.qq.com (ESMTP) with id ; Fri, 29 Jan 2016 23:20:50 +0800 (CST) X-QQ-SSF: B100000000000040F3500000000000Z X-QQ-FEAT: c4UTs2StzDanZHlPezQ2nACtNYfyVN/C2suAERKDCs2fuhVsnpSj/4lFL+hnx HQ3kSbncLHniaADpjzFRciOBrtBUgTem2hAS/9ks/Ehfl9det8tgFfUKVLdypc+la8Kpp2S PhYYtzQIO6dGTKljTH1nBYNnL86IJnrcjop1BzWzMqfYarPbVcy172I0Twjb7CJmOi1Fvxd xemJtUd2TzwuGoEM4ghCP7jb/Cs+dFFsYF1VRRojDtX8RuL2B4sNf X-QQ-GoodBg: 0 From: Chen Feng To: lee.jones@linaro.org, linux-kernel@vger.kernel.org, lgirdwood@gmail.com, broonie@kernel.org, puck.chen@hisilicon.com, w.f@huawei.com, kong.kongxinwei@hisilicon.com, haojian.zhuang@linaro.org Cc: puck.chen@foxmail.com Subject: [PATCH v7 1/5] mfd: hi655x: Add document for mfd hi665x PMIC Date: Fri, 29 Jan 2016 23:20:22 +0800 Message-Id: <1454080826-6760-2-git-send-email-puck.chen@foxmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1454080826-6760-1-git-send-email-puck.chen@foxmail.com> References: <1454080826-6760-1-git-send-email-puck.chen@foxmail.com> X-QQ-SENDSIZE: 520 X-QQ-FName: 158B0B43409644D2A7B865633FCF37F7 X-QQ-LocalIP: 10.130.87.224 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Chen Feng DT bindings for hisilicon hi655x MFD PMIC chip. Signed-off-by: Chen Feng Signed-off-by: Fei Wang Signed-off-by: Xinwei Kong Reviewed-by: Haojian Zhuang --- .../devicetree/bindings/mfd/hisilicon,hi655x.txt | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt -- 1.9.1 diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt new file mode 100644 index 0000000..56d3333 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt @@ -0,0 +1,27 @@ +Hisilicon hi655x Power Management Integrated Circuit (PMIC) + +The hardware layout for access PMIC Hi655x from AP SoC Hi6220. +Between PMIC Hi655x and Hi6220, the physical signal channel is SSI. +We can use memory-mapped I/O to communicate. + ++----------------+ +-------------+ +| | | | +| Hi6220 | SSI bus | Hi655x | +| |-------------| | +| |(REGMAP_MMIO)| | ++----------------+ +-------------+ + +Required properties: +- compatible: Should be "hisilicon,hi655x-pmic" +- reg: Base address of PMIC on hi6220 soc +- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain). +- pmic-gpios: The gpio used by PMIC irq. + +Example: + pmic: pmic@f8000000 { + compatible = "hisilicon,hi655x-pmic"; + reg = <0x0 0xf8000000 0x0 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + }