From patchwork Tue Jan 26 17:10:33 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 60500 Delivered-To: patch@linaro.org Received: by 10.112.130.2 with SMTP id oa2csp2092539lbb; Tue, 26 Jan 2016 09:17:10 -0800 (PST) X-Received: by 10.66.55.73 with SMTP id q9mr35485603pap.44.1453828629862; Tue, 26 Jan 2016 09:17:09 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e82si3108725pfb.126.2016.01.26.09.17.09; Tue, 26 Jan 2016 09:17:09 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dkim=pass header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S967105AbcAZRRI (ORCPT + 30 others); Tue, 26 Jan 2016 12:17:08 -0500 Received: from mail-wm0-f44.google.com ([74.125.82.44]:37752 "EHLO mail-wm0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966834AbcAZRLO (ORCPT ); Tue, 26 Jan 2016 12:11:14 -0500 Received: by mail-wm0-f44.google.com with SMTP id n5so141735922wmn.0 for ; Tue, 26 Jan 2016 09:11:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=mQUjDNQbfnoR6gna4QjHbntlQ9SLHS4XS2VW8IOJtqE=; b=CqHRZEdhhRTi3u0/xdaxrkM8Ri3lIINynbzIeDUTm4FVx4y41fIkAehO1/BtEZGSWB 95KZ/psKl4IFbv3miTh4xkaa/s+2P6d21J0eZyc+M/1NIDvWR+cRqU8RA/FD7dzFsggG 5iQv6mlobWA0EVadmy0bOW2tR3xP7epWl2i3k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=mQUjDNQbfnoR6gna4QjHbntlQ9SLHS4XS2VW8IOJtqE=; b=U4Xg9vRA7+k7LTEYYs74wnlqLPdydSIbuFzfLVXy88BtsXCjHUx8Y9F6tzYN9uexM5 MEFUd8vgX5ShTCaf0e6MYly5zSzeHv1Lsg1gvMjOyHMTaZqhT/25KFfztVYS5txnUbAm sZdDURDIsmb7nDqNr/Vei0oT+igfPpFlcXiSNBLPiG/caTdpNd8JnPlJpGNFI+k7zDiv Nd90aoryqq7h+zwNzSb7TzTwBjvauRGlfYnBGhC1x1vGeeWNh+EbPYMNJqmHIog7t3YX u4az2cxoPeaKuCRo1UOLfm6XeJ74/T0ch40BxRZS5fs75efgzNJSdZ+LISknMzbtxMlq p3QA== X-Gm-Message-State: AG10YOT+25ZMvU/B30xxtAQdBpfvD7e6T+A0chx9zOBVnqhSnglvJ787qGjhn36c2grToLWP X-Received: by 10.28.111.18 with SMTP id k18mr23978884wmc.86.1453828273084; Tue, 26 Jan 2016 09:11:13 -0800 (PST) Received: from localhost.localdomain ([195.55.142.58]) by smtp.gmail.com with ESMTPSA id ko2sm2328617wjc.9.2016.01.26.09.11.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 26 Jan 2016 09:11:12 -0800 (PST) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, kernel-hardening@lists.openwall.com, will.deacon@arm.com, catalin.marinas@arm.com, mark.rutland@arm.com, leif.lindholm@linaro.org, keescook@chromium.org, linux-kernel@vger.kernel.org Cc: stuart.yoder@freescale.com, bhupesh.sharma@freescale.com, arnd@arndb.de, marc.zyngier@arm.com, christoffer.dall@linaro.org, labbott@fedoraproject.org, matt@codeblueprint.co.uk, Ard Biesheuvel Subject: [PATCH v4 06/22] arm64: add support for ioremap() block mappings Date: Tue, 26 Jan 2016 18:10:33 +0100 Message-Id: <1453828249-14467-7-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1453828249-14467-1-git-send-email-ard.biesheuvel@linaro.org> References: <1453828249-14467-1-git-send-email-ard.biesheuvel@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This wires up the existing generic huge-vmap feature, which allows ioremap() to use PMD or PUD sized block mappings. Signed-off-by: Ard Biesheuvel --- Documentation/features/vm/huge-vmap/arch-support.txt | 2 +- arch/arm64/Kconfig | 1 + arch/arm64/include/asm/memory.h | 6 +++ arch/arm64/mm/mmu.c | 41 ++++++++++++++++++++ 4 files changed, 49 insertions(+), 1 deletion(-) -- 2.5.0 diff --git a/Documentation/features/vm/huge-vmap/arch-support.txt b/Documentation/features/vm/huge-vmap/arch-support.txt index af6816bccb43..df1d1f3c9af2 100644 --- a/Documentation/features/vm/huge-vmap/arch-support.txt +++ b/Documentation/features/vm/huge-vmap/arch-support.txt @@ -9,7 +9,7 @@ | alpha: | TODO | | arc: | TODO | | arm: | TODO | - | arm64: | TODO | + | arm64: | ok | | avr32: | TODO | | blackfin: | TODO | | c6x: | TODO | diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 8cc62289a63e..cd767fa3037a 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -49,6 +49,7 @@ config ARM64 select HAVE_ALIGNED_STRUCT_PAGE if SLUB select HAVE_ARCH_AUDITSYSCALL select HAVE_ARCH_BITREVERSE + select HAVE_ARCH_HUGE_VMAP select HAVE_ARCH_JUMP_LABEL select HAVE_ARCH_KASAN if SPARSEMEM_VMEMMAP && !(ARM64_16K_PAGES && ARM64_VA_BITS_48) select HAVE_ARCH_KGDB diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h index bea9631b34a8..aebc739f5a11 100644 --- a/arch/arm64/include/asm/memory.h +++ b/arch/arm64/include/asm/memory.h @@ -106,6 +106,12 @@ #define MT_S2_NORMAL 0xf #define MT_S2_DEVICE_nGnRE 0x1 +#ifdef CONFIG_ARM64_4K_PAGES +#define IOREMAP_MAX_ORDER (PUD_SHIFT) +#else +#define IOREMAP_MAX_ORDER (PMD_SHIFT) +#endif + #ifndef __ASSEMBLY__ extern phys_addr_t memstart_addr; diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index cb3a7bdb4e23..b84915723ea0 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -710,3 +710,44 @@ void *__init fixmap_remap_fdt(phys_addr_t dt_phys) return dt_virt; } + +int __init arch_ioremap_pud_supported(void) +{ + /* only 4k granule supports level 1 block mappings */ + return IS_ENABLED(CONFIG_ARM64_4K_PAGES); +} + +int __init arch_ioremap_pmd_supported(void) +{ + return 1; +} + +int pud_set_huge(pud_t *pud, phys_addr_t phys, pgprot_t prot) +{ + BUG_ON(phys & ~PUD_MASK); + set_pud(pud, __pud(phys | PUD_TYPE_SECT | pgprot_val(mk_sect_prot(prot)))); + return 1; +} + +int pmd_set_huge(pmd_t *pmd, phys_addr_t phys, pgprot_t prot) +{ + BUG_ON(phys & ~PMD_MASK); + set_pmd(pmd, __pmd(phys | PMD_TYPE_SECT | pgprot_val(mk_sect_prot(prot)))); + return 1; +} + +int pud_clear_huge(pud_t *pud) +{ + if (!pud_sect(*pud)) + return 0; + pud_clear(pud); + return 1; +} + +int pmd_clear_huge(pmd_t *pmd) +{ + if (!pmd_sect(*pmd)) + return 0; + pmd_clear(pmd); + return 1; +}