From patchwork Thu Jan 14 21:45:58 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 59774 Delivered-To: patch@linaro.org Received: by 10.112.130.2 with SMTP id oa2csp152862lbb; Thu, 14 Jan 2016 13:47:28 -0800 (PST) X-Received: by 10.67.5.98 with SMTP id cl2mr9566747pad.157.1452808048310; Thu, 14 Jan 2016 13:47:28 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id mk9si11612287pab.101.2016.01.14.13.47.26; Thu, 14 Jan 2016 13:47:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dkim=pass header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754854AbcANVrK (ORCPT + 29 others); Thu, 14 Jan 2016 16:47:10 -0500 Received: from mail-pf0-f178.google.com ([209.85.192.178]:36555 "EHLO mail-pf0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754760AbcANVrF (ORCPT ); Thu, 14 Jan 2016 16:47:05 -0500 Received: by mail-pf0-f178.google.com with SMTP id n128so106055249pfn.3 for ; Thu, 14 Jan 2016 13:47:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/I+bll/CRZKlyOIyB7HMtrntGmkf7/2QjsBhMQloaKg=; b=jkvffzVXkxUU9vyICWMOncN0/8L17HbD6ottjtrZaHyk13rdxfoaB909dmg73Tv7XU 972hLFMnfsuSVk4Tmc4jZZJU3axz1w/3s/6jK3rWVGgbLB0iJSwFTnQ+m0FE8/P0jbV6 5JLMyqyHIoYsLDK1C/HUQX+lw32muYRZdW3T8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/I+bll/CRZKlyOIyB7HMtrntGmkf7/2QjsBhMQloaKg=; b=kC0g0Bys8UDN98G7lqgVB3z3oLi/HIdyTD0/40Bn8eZhIhnVa4Ib4b59TzyfdfqTEw MBPPOE9spbx9KqE1dhnIRvSrZqk5AkBE8NcYvm9tYpbKGNPqGrrpHyapgakhwSkWKruc PjGIe12h/nrZS0DhmAaL/sKrrkXbzobqXi1daT2A8Fy/4GE/LmS0X/q11mwJDxedjyt8 JbpD+pPKMP7LuJfwtGQICK4W3glreERXFWBrfRUmAft8n9eENGze/CKK5WulFIU4+SZt OKdAnJJ7oLwaXIGxokMkPIZ6fiPU8gHUpI7phG2xwua+LMzHvu14cCnvRLuz6UgrvYcQ 3f+A== X-Gm-Message-State: AG10YORbGe49qCNmHh6Uz5+FZX9geqcENiIT3BE5e0iB7Bl4LEQOgR1Rtfcwj80QN2j/yMp3 X-Received: by 10.98.11.209 with SMTP id 78mr6915986pfl.92.1452808025029; Thu, 14 Jan 2016 13:47:05 -0800 (PST) Received: from t430.cg.shawcable.net ([184.64.168.246]) by smtp.gmail.com with ESMTPSA id c87sm11383309pfj.41.2016.01.14.13.47.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 14 Jan 2016 13:47:04 -0800 (PST) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: linux-doc@vger.kernel.org, zhang.chunyan@linaro.org, mike.leach@arm.com, tor@ti.com, al.grant@arm.com, rabin@rab.in, Mathieu Poirier Subject: [PATCH V8 04/23] coresight: etm3x: moving etm_readl/writel to header file Date: Thu, 14 Jan 2016 14:45:58 -0700 Message-Id: <1452807977-8069-5-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1452807977-8069-1-git-send-email-mathieu.poirier@linaro.org> References: <1452807977-8069-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Moving functions etm_readl/writel to file "coresight-etm.h" so that the main ETM3x driver can be split in more than one file. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm.h | 29 +++++++++++++++++++++++++++ drivers/hwtracing/coresight/coresight-etm3x.c | 29 --------------------------- 2 files changed, 29 insertions(+), 29 deletions(-) -- 2.1.4 diff --git a/drivers/hwtracing/coresight/coresight-etm.h b/drivers/hwtracing/coresight/coresight-etm.h index b4481eb29304..34f7db881fa7 100644 --- a/drivers/hwtracing/coresight/coresight-etm.h +++ b/drivers/hwtracing/coresight/coresight-etm.h @@ -251,4 +251,33 @@ enum etm_addr_type { ETM_ADDR_TYPE_START, ETM_ADDR_TYPE_STOP, }; + +static inline void etm_writel(struct etm_drvdata *drvdata, + u32 val, u32 off) +{ + if (drvdata->use_cp14) { + if (etm_writel_cp14(off, val)) { + dev_err(drvdata->dev, + "invalid CP14 access to ETM reg: %#x", off); + } + } else { + writel_relaxed(val, drvdata->base + off); + } +} + +static inline unsigned int etm_readl(struct etm_drvdata *drvdata, u32 off) +{ + u32 val; + + if (drvdata->use_cp14) { + if (etm_readl_cp14(off, &val)) { + dev_err(drvdata->dev, + "invalid CP14 access to ETM reg: %#x", off); + } + } else { + val = readl_relaxed(drvdata->base + off); + } + + return val; +} #endif diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index fae66cb45424..3be1f14da44c 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -42,35 +42,6 @@ module_param_named(boot_enable, boot_enable, int, S_IRUGO); static int etm_count; static struct etm_drvdata *etmdrvdata[NR_CPUS]; -static inline void etm_writel(struct etm_drvdata *drvdata, - u32 val, u32 off) -{ - if (drvdata->use_cp14) { - if (etm_writel_cp14(off, val)) { - dev_err(drvdata->dev, - "invalid CP14 access to ETM reg: %#x", off); - } - } else { - writel_relaxed(val, drvdata->base + off); - } -} - -static inline unsigned int etm_readl(struct etm_drvdata *drvdata, u32 off) -{ - u32 val; - - if (drvdata->use_cp14) { - if (etm_readl_cp14(off, &val)) { - dev_err(drvdata->dev, - "invalid CP14 access to ETM reg: %#x", off); - } - } else { - val = readl_relaxed(drvdata->base + off); - } - - return val; -} - /* * Memory mapped writes to clear os lock are not supported on some processors * and OS lock must be unlocked before any memory mapped access on such