From patchwork Fri Dec 18 20:59:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 58752 Delivered-To: patch@linaro.org Received: by 10.112.89.199 with SMTP id bq7csp1269985lbb; Fri, 18 Dec 2015 13:04:58 -0800 (PST) X-Received: by 10.66.236.229 with SMTP id ux5mr8255707pac.91.1450472698638; Fri, 18 Dec 2015 13:04:58 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d10si26125045pap.237.2015.12.18.13.04.56; Fri, 18 Dec 2015 13:04:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dkim=neutral (body hash did not verify) header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965560AbbLRVEy (ORCPT + 29 others); Fri, 18 Dec 2015 16:04:54 -0500 Received: from mail-io0-f182.google.com ([209.85.223.182]:35030 "EHLO mail-io0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965354AbbLRU77 (ORCPT ); Fri, 18 Dec 2015 15:59:59 -0500 Received: by mail-io0-f182.google.com with SMTP id q126so102238364iof.2 for ; Fri, 18 Dec 2015 12:59:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=S769ffqSvQeCLcpR74/4V6mrdCnjSDWEXZgyGAkmFO8=; b=Po9T4xpVj5t+mYvmjqHzlc2bQL14509jJaA6RI/1ipKtx2f9G9Kx6vKh8Y0FzNgrZY 5GMPz7GDYoIlKtmDWj9WwJh1pzeMDsVL1oA/nmxOizX0IQSAFn2LhUr55pFGLkbX9fvI ZzMfxTVLebHbfb84MkxXaglEm6+6UVZ5YNU0M= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=S769ffqSvQeCLcpR74/4V6mrdCnjSDWEXZgyGAkmFO8=; b=MC+nGMVk75mBW/nbmNWFVBHuYNBwpEJW6GdxHm/IHrGCPp72fx140zU4e39z9bLVKC vh36LMHfvuSETVTvPJNChzRcLUYj4uSt3PEjCHZ7/p8qGVhmaD3oz54uwkReGAGNfaln bKS5moAKrfE82H8YmnY/HMGSepdKeJGqMlztevPa6WRiJF9LP/zEQKrC7ZkJYeGc3mu8 Axn/DmdFGL/4P0o1XiPBWjgXhApO61UBauyQvX3/OMmBwpPEhxceLWI8vfQe7GnIho9r 4LC+CtPEJVaxDVNCDgzXUnkBDKNDOhzWdjuuo/KtAMMS+rEJZQAeXw/2BwRyHfPFi5QH 2Fpw== X-Gm-Message-State: ALoCoQk4pCQKuXIzhWaGu7mjhjOMtFuiBWjz66l/TLlqRYs8tAaHtT2E2RJ+KRTqK9+b2MBlnJeQLGgiegMFjzYU2eTXl3x2TQ== X-Received: by 10.107.165.140 with SMTP id o134mr6533596ioe.118.1450472398633; Fri, 18 Dec 2015 12:59:58 -0800 (PST) Received: from t430.cg.shawcable.net (S0106002369de4dac.cg.shawcable.net. [184.64.168.246]) by smtp.gmail.com with ESMTPSA id l10sm843701igx.18.2015.12.18.12.59.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 18 Dec 2015 12:59:58 -0800 (PST) From: Mathieu Poirier To: gregkh@linuxfoundation.org, alexander.shishkin@linux.intel.com Cc: zhang.chunyan@linaro.org, mike.leach@arm.com, tor@ti.com, al.grant@arm.com, fainelli@broadcom.com, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Mathieu Poirier Subject: [PATCH V7 12/24] coresight: etm3x: consolidating initial config Date: Fri, 18 Dec 2015 13:59:08 -0700 Message-Id: <1450472361-426-13-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1450472361-426-1-git-send-email-mathieu.poirier@linaro.org> References: <1450472361-426-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There is really no point in having two functions to take care of doing the initial tracer configuration. As such moving everything to 'etm_set_default()'. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm3x.c | 37 ++++++++++----------------- 1 file changed, 14 insertions(+), 23 deletions(-) -- 2.1.4 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index c97232ab7564..9293e71a075a 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -41,7 +41,6 @@ module_param_named(boot_enable, boot_enable, int, S_IRUGO); /* The number of ETM/PTM currently registered */ static int etm_count; static struct etm_drvdata *etmdrvdata[NR_CPUS]; -static void etm_init_default_data(struct etm_config *config); /* * Memory mapped writes to clear os lock are not supported on some processors @@ -194,6 +193,19 @@ void etm_set_default(struct etm_config *config) if (WARN_ON_ONCE(!config)) return; + /* + * Taken verbatim from the TRM: + * + * To trace all memory: + * set bit [24] in register 0x009, the ETMTECR1, to 1 + * set all other bits in register 0x009, the ETMTECR1, to 0 + * set all bits in register 0x007, the ETMTECR2, to 0 + * set register 0x008, the ETMTEEVR, to 0x6F (TRUE). + */ + config->enable_ctrl1 = BIT(24); + config->enable_ctrl2 = 0x0; + config->enable_event = ETM_HARD_WIRE_RES_A; + config->trigger_event = ETM_DEFAULT_EVENT_VAL; config->enable_event = ETM_HARD_WIRE_RES_A; @@ -579,27 +591,6 @@ static void etm_init_arch_data(void *info) CS_LOCK(drvdata->base); } -static void etm_init_default_data(struct etm_config *config) -{ - if (WARN_ON_ONCE(!config)) - return; - - etm_set_default(config); - - /* - * Taken verbatim from the TRM: - * - * To trace all memory: - * set bit [24] in register 0x009, the ETMTECR1, to 1 - * set all other bits in register 0x009, the ETMTECR1, to 0 - * set all bits in register 0x007, the ETMTECR2, to 0 - * set register 0x008, the ETMTEEVR, to 0x6F (TRUE). - */ - config->enable_ctrl1 = BIT(24); - config->enable_ctrl2 = 0x0; - config->enable_event = ETM_HARD_WIRE_RES_A; -} - static void etm_init_trace_id(struct etm_drvdata *drvdata) { /* @@ -676,7 +667,7 @@ static int etm_probe(struct amba_device *adev, const struct amba_id *id) } etm_init_trace_id(drvdata); - etm_init_default_data(&drvdata->config); + etm_set_default(&drvdata->config); desc->type = CORESIGHT_DEV_TYPE_SOURCE; desc->subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_PROC;