From patchwork Tue Nov 17 11:57:46 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Feng X-Patchwork-Id: 56784 Delivered-To: patch@linaro.org Received: by 10.112.155.196 with SMTP id vy4csp1887144lbb; Tue, 17 Nov 2015 03:58:29 -0800 (PST) X-Received: by 10.66.170.238 with SMTP id ap14mr61411062pac.128.1447761509220; Tue, 17 Nov 2015 03:58:29 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id rx1si6946320pbb.37.2015.11.17.03.58.28; Tue, 17 Nov 2015 03:58:29 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753029AbbKQL60 (ORCPT + 28 others); Tue, 17 Nov 2015 06:58:26 -0500 Received: from szxga03-in.huawei.com ([119.145.14.66]:46181 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750778AbbKQL6Z (ORCPT ); Tue, 17 Nov 2015 06:58:25 -0500 Received: from 172.24.1.47 (EHLO szxeml425-hub.china.huawei.com) ([172.24.1.47]) by szxrg03-dlp.huawei.com (MOS 4.4.3-GA FastPath queued) with ESMTP id BRD81992; Tue, 17 Nov 2015 19:58:05 +0800 (CST) Received: from vm163-62.huawei.com (10.184.163.62) by szxeml425-hub.china.huawei.com (10.82.67.180) with Microsoft SMTP Server id 14.3.235.1; Tue, 17 Nov 2015 19:57:52 +0800 From: Chen Feng To: , , , , , , , , , , , , , , , , CC: , , , , , , , Subject: [PATCH 1/3] docs: iommu: Documentation for iommu in hi6220 SoC Date: Tue, 17 Nov 2015 19:57:46 +0800 Message-ID: <1447761468-36952-2-git-send-email-puck.chen@hisilicon.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1447761468-36952-1-git-send-email-puck.chen@hisilicon.com> References: <1447761468-36952-1-git-send-email-puck.chen@hisilicon.com> MIME-Version: 1.0 X-Originating-IP: [10.184.163.62] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090204.564B1657.00CE, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 93ac352954b72e5acda69dfccf36aa8e Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Documentation for hi6220 iommu driver. Signed-off-by: Chen Feng --- .../bindings/iommu/hisi,hi6220-iommu.txt | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ diff --git a/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt b/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt new file mode 100644 index 0000000..44f9101 --- /dev/null +++ b/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt @@ -0,0 +1,32 @@ +Hi6220 SoC SMMU Device Driver devicetree document +The media system shared the same smmu IP to access DDR memory. And all +media IP used the same page table. + +Below binding describes the system mmu for media system in hi6220 platform + +Required properties: +- compatible: should contain "hisilicon,hi6220-smmu". +- reg: A tuple of base address and size of System MMU registers. +- clocks: a list of phandle + clock-specifier pairs, one for each entry + in clock-names. +- clock-names: should contain: + * "smmu" + * "media-sc" + * "smmu-peri" +- interrupts: An interrupt specifier for interrupt signal of System MMU. +- #iommu-cells: The iommu-cells should be 0. Because no additional information + needs to be encoded in the specifier. + +Examples: + iommu@f4210000 { + compatible = "hisilicon,hi6220-smmu"; + reg = <0x0 0xf4210000 0x0 0x1000>; + interrupts = ; + clocks = <&sys_ctrl HI6220_MMU_CLK>, + <&media_ctrl HI6220_MED_MMU>, + <&sys_ctrl HI6220_MEDIA_PLL_SRC>; + clock-names = "smmu", + "media-sc", + "smmu-peri"; + #iommu-cells = <0>; + };