From patchwork Wed Oct 28 08:48:29 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Feng X-Patchwork-Id: 55655 Delivered-To: patch@linaro.org Received: by 10.112.59.35 with SMTP id w3csp2264711lbq; Wed, 28 Oct 2015 01:50:01 -0700 (PDT) X-Received: by 10.68.225.66 with SMTP id ri2mr32949344pbc.59.1446022201513; Wed, 28 Oct 2015 01:50:01 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id eg4si68838034pbc.189.2015.10.28.01.50.01; Wed, 28 Oct 2015 01:50:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932593AbbJ1It7 (ORCPT + 28 others); Wed, 28 Oct 2015 04:49:59 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:14843 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754770AbbJ1It4 (ORCPT ); Wed, 28 Oct 2015 04:49:56 -0400 Received: from 172.24.1.51 (EHLO szxeml428-hub.china.huawei.com) ([172.24.1.51]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CVF65584; Wed, 28 Oct 2015 16:49:04 +0800 (CST) Received: from vm163-62.huawei.com (10.184.163.62) by szxeml428-hub.china.huawei.com (10.82.67.183) with Microsoft SMTP Server id 14.3.235.1; Wed, 28 Oct 2015 16:48:33 +0800 From: Chen Feng To: , , , , , , , , , , , , , , , , , CC: , , , Subject: [PATCH V4 1/3] bindings for hisilicon hi6220 iommu driver Date: Wed, 28 Oct 2015 16:48:29 +0800 Message-ID: <1446022111-57263-1-git-send-email-puck.chen@hisilicon.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-Originating-IP: [10.184.163.62] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org docs: iommu: Documentation for iommu in hi6220 SoC. Signed-off-by: Chen Feng Signed-off-by: Yu Dongbin --- .../bindings/iommu/hisi,hi6220-iommu.txt | 56 ++++++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ diff --git a/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt b/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt new file mode 100644 index 0000000..756e64f --- /dev/null +++ b/Documentation/devicetree/bindings/iommu/hisi,hi6220-iommu.txt @@ -0,0 +1,56 @@ +Hi6220 SoC SMMU Device Driver devicetree document +======================================================================= +The Architecture of SMMU on Hi6220 SoC: + + +------------------------------------------------------------------+ + | | + | +---------+ +--------+ +-------------+ +-------+ | + | | ADE | | ISP | | V/J codec | | G3D | | + | +----|----+ +---|----+ +------|------+ +---|---| | + | | | | | | + | ---------v-----------v--------------v--------------v----- | + | Media Bus | + | --------------------------------|---------------|-------- | + | | | | + | +---v---------------v--------+ | + | | SMMU | | + | +----------|---------|-------+ | + | | | | + +--------------------------------------------|---------|-----------+ + | | + +------------v---------v-----------+ + | DDRC | + +----------------------------------+ + +Note: +The media system shared the same smmu IP to access DDR memory. And all +media IP used the same page table. + +Below binding describes the system mmu for media system in hi6220 platform + +Required properties: +- compatible: should contain "hisilicon,hi6220-smmu". +- reg: A tuple of base address and size of System MMU registers. +- clocks: a list of phandle + clock-specifier pairs, one for each entry + in clock-names. +- clock-names: should contain: + * "smmu" + * "media-sc" + * "smmu-peri" +- interrupts: An interrupt specifier for interrupt signal of System MMU. +- #iommu-cells: The iommu-cells should be 0. Because no additional information + needs to be encoded in the specifier. + +Examples: + iommu@f4210000 { + compatible = "hisilicon,hi6220-smmu"; + reg = <0x0 0xf4210000 0x0 0x1000>; + interrupts = ; + clocks = <&sys_ctrl HI6220_MMU_CLK>, + <&media_ctrl HI6220_MED_MMU>, + <&sys_ctrl HI6220_MEDIA_PLL_SRC>; + clock-names = "smmu", + "media-sc", + "smmu-peri"; + #iommu-cells = <0>; + };