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[2001:1868:205::9]) by mx.google.com with ESMTPS id v2si17475644igh.21.2015.10.20.02.01.43 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Oct 2015 02:01:44 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZoSmd-0004fh-Fl; Tue, 20 Oct 2015 09:00:39 +0000 Received: from szxga02-in.huawei.com ([119.145.14.65]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZoSmY-0002VR-GP for linux-arm-kernel@lists.infradead.org; Tue, 20 Oct 2015 09:00:36 +0000 Received: from 172.24.1.50 (EHLO szxeml426-hub.china.huawei.com) ([172.24.1.50]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CUO53576; Tue, 20 Oct 2015 16:42:11 +0800 (CST) Received: from localhost (10.177.235.245) by szxeml426-hub.china.huawei.com (10.82.67.181) with Microsoft SMTP Server id 14.3.235.1; Tue, 20 Oct 2015 16:42:02 +0800 From: MaJun To: , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v6 2/4] irqchip: add platform device driver for mbigen device Date: Tue, 20 Oct 2015 16:41:58 +0800 Message-ID: <1445330520-11960-3-git-send-email-majun258@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.1 In-Reply-To: <1445330520-11960-1-git-send-email-majun258@huawei.com> References: <1445330520-11960-1-git-send-email-majun258@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.235.245] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151020_020035_051318_AE5D87F5 X-CRM114-Status: GOOD ( 18.90 ) X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [119.145.14.65 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [119.145.14.65 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: majun258@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.174 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Ma Jun Mbigen means Message Based Interrupt Generator(MBIGEN). Its a kind of interrupt controller that collects the interrupts from external devices and generate msi interrupt. Mbigen is applied to reduce the number of wire connected interrupts. As the peripherals increasing, the interrupts lines needed is increasing much, especially on the Arm64 server SOC. Therefore, the interrupt pin in GIC is not enough to cover so many peripherals. Mbigen is designed to fix this problem. Mbigen chip locates in ITS or outside of ITS. Mbigen chip hardware structure shows as below: mbigen chip |---------------------|-------------------| mgn_node0 mgn_node1 mgn_node2 | |-------| |-------|------| dev1 dev1 dev2 dev1 dev3 dev4 Each mbigen chip contains several mbigen nodes. External devices can connect to mbigen node through wire connecting way. Because a mbigen node only can support 128 interrupt maximum, depends on the interrupt lines number of devices, a device can connects to one more mbigen nodes. Also, several different devices can connect to a same mbigen node. When devices triggered interrupt,mbigen chip detects and collects the interrupts and generates the MBI interrupts by writing the ITS Translator register. To simplify mbigen driver,I used a new conception--mbigen device. Each mbigen device is initialized as a platform device. Mbigen device presents the parts(register, pin definition etc.) in mbigen chip corresponding to a peripheral device. So from software view, the structure likes below mbigen chip |---------------------|-----------------| mbigen device1 mbigen device2 mbigen device3 | | | dev1 dev2 dev3 Signed-off-by: Ma Jun --- drivers/irqchip/irq-mbigen.c | 83 ++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 83 insertions(+), 0 deletions(-) create mode 100644 drivers/irqchip/irq-mbigen.c diff --git a/drivers/irqchip/irq-mbigen.c b/drivers/irqchip/irq-mbigen.c new file mode 100644 index 0000000..f18132f --- /dev/null +++ b/drivers/irqchip/irq-mbigen.c @@ -0,0 +1,83 @@ +/* + * Copyright (C) 2015 Hisilicon Limited, All Rights Reserved. + * Author: Jun Ma + * Author: Yun Wu + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include +#include +#include +#include + +/** + * struct mbigen_device - holds the information of mbigen device. + * + * @pdev: pointer to the platform device structure of mbigen chip. + * @base: mapped address of this mbigen chip. + */ +struct mbigen_device { + struct platform_device *pdev; + void __iomem *base; +}; + +static int mbigen_device_probe(struct platform_device *pdev) +{ + struct mbigen_device *mgn_chip; + + mgn_chip = devm_kzalloc(&pdev->dev, sizeof(*mgn_chip), GFP_KERNEL); + if (!mgn_chip) + return -ENOMEM; + + mgn_chip->pdev = pdev; + mgn_chip->base = of_iomap(pdev->dev.of_node, 0); + + platform_set_drvdata(pdev, mgn_chip); + + return 0; +} + +static int mbigen_device_remove(struct platform_device *pdev) +{ + struct mbigen_device *mgn_chip = platform_get_drvdata(pdev); + + iounmap(mgn_chip->base); + + return 0; +} + +static const struct of_device_id mbigen_of_match[] = { + { .compatible = "hisilicon,mbigen-v2" }, + { /* END */ } +}; +MODULE_DEVICE_TABLE(of, mbigen_of_match); + +static struct platform_driver mbigen_platform_driver = { + .driver = { + .name = "Hisilicon MBIGEN-V2", + .owner = THIS_MODULE, + .of_match_table = mbigen_of_match, + }, + .probe = mbigen_device_probe, + .remove = mbigen_device_remove, +}; + +module_platform_driver(mbigen_platform_driver); + +MODULE_AUTHOR("Jun Ma "); +MODULE_AUTHOR("Yun Wu "); +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Hisilicon MBI Generator driver");