From patchwork Tue Oct 6 17:02:07 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felipe Balbi X-Patchwork-Id: 54551 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wi0-f198.google.com (mail-wi0-f198.google.com [209.85.212.198]) by patches.linaro.org (Postfix) with ESMTPS id 57B0222FC5 for ; Tue, 6 Oct 2015 17:06:50 +0000 (UTC) Received: by wicmn1 with SMTP id mn1sf44149199wic.1 for ; Tue, 06 Oct 2015 10:06:49 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:subject:date:message-id :in-reply-to:references:mime-version:precedence:list-id :list-unsubscribe:list-archive:list-post:list-help:list-subscribe:cc :content-type:content-transfer-encoding:sender:errors-to :x-original-sender:x-original-authentication-results:mailing-list; bh=UM/EqWYUlmXiN2C5iMbP/wuyI00jDJeLUUr9kDXeeMk=; b=OajYmfcsLIVLt6Ey30NnjRtbjZTJyOiz+3oAe1ntjwZF67308czFIJGoXJuZYjflsQ Q9VRR2AdwE1BmfEz62DsIqFvU6jyt3EB9aln7QofB7+HptSKPnjIEMROKER5rbiDEoKH VTeZtGsH81HXztL854mq13S+yfnrYwstjaZbsvL6bZafyAKAXm4REgwcNdoH4NWkdGjq UXAUM/e5kvWScrCpBIxW2cp2ZQLAP7rLHEfjBRk9Ptw43vjaJ4f5G6x/fbIsnslhlHq+ NfoMJy32utO5RH4SRKuEGKHqGhdOfMoV6AgQKtrq3cDKPCbCbGT/8fufgLOaO0PRUoVA 28Rg== X-Gm-Message-State: ALoCoQn5+J7mfSx7JCiX67pf5qSgUL1FAI9eZ6ZRSqh96YIEk48J8E3zgIUL8uJklGHGZNgqX0YU X-Received: by 10.180.106.197 with SMTP id gw5mr3593531wib.7.1444151209602; Tue, 06 Oct 2015 10:06:49 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.25.143.209 with SMTP id r200ls668843lfd.6.gmail; Tue, 06 Oct 2015 10:06:49 -0700 (PDT) X-Received: by 10.112.16.199 with SMTP id i7mr15074427lbd.105.1444151209446; Tue, 06 Oct 2015 10:06:49 -0700 (PDT) Received: from mail-la0-f50.google.com (mail-la0-f50.google.com. [209.85.215.50]) by mx.google.com with ESMTPS id r195si21636872lfg.159.2015.10.06.10.06.49 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 06 Oct 2015 10:06:49 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.50 as permitted sender) client-ip=209.85.215.50; Received: by lacwq3 with SMTP id wq3so2394962lac.0 for ; Tue, 06 Oct 2015 10:06:49 -0700 (PDT) X-Received: by 10.112.202.35 with SMTP id kf3mr15267785lbc.19.1444151209278; Tue, 06 Oct 2015 10:06:49 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.59.35 with SMTP id w3csp1966197lbq; Tue, 6 Oct 2015 10:06:48 -0700 (PDT) X-Received: by 10.180.79.34 with SMTP id g2mr19691729wix.28.1444151208684; Tue, 06 Oct 2015 10:06:48 -0700 (PDT) Received: from bombadil.infradead.org (bombadil.infradead.org. [2001:1868:205::9]) by mx.google.com with ESMTPS id q7si24878235wia.93.2015.10.06.10.06.48 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 06 Oct 2015 10:06:48 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZjVed-0006iL-VL; Tue, 06 Oct 2015 17:03:55 +0000 Received: from comal.ext.ti.com ([198.47.26.152]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZjVdX-0005u6-Jx for linux-arm-kernel@lists.infradead.org; Tue, 06 Oct 2015 17:02:50 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id t96H2NJ9001435; Tue, 6 Oct 2015 12:02:23 -0500 Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t96H2Nqq015035; Tue, 6 Oct 2015 12:02:23 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.224.2; Tue, 6 Oct 2015 12:02:24 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id t96H2MSs006591; Tue, 6 Oct 2015 12:02:23 -0500 From: Felipe Balbi To: Tony Lindgren Subject: [PATCH 11/11] arm: omap2: timer: limit hwmod usage to non-DT boots Date: Tue, 6 Oct 2015 12:02:07 -0500 Message-ID: <1444150927-14771-12-git-send-email-balbi@ti.com> X-Mailer: git-send-email 2.5.3 In-Reply-To: <1444150927-14771-1-git-send-email-balbi@ti.com> References: <1444150927-14771-1-git-send-email-balbi@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151006_100247_929056_7D79B2AF X-CRM114-Status: GOOD ( 12.60 ) X-Spam-Score: -6.9 (------) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-6.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [198.47.26.152 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [198.47.26.152 listed in wl.mailspike.net] -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Cc: daniel.lezcano@linaro.org, Linux Kernel Mailing List , Felipe Balbi , tglx@linutronix.de, Linux OMAP Mailing List , Linux ARM Kernel Mailing List Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: balbi@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.50 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 now that we have a working 32k clocksource driver, we can limit HWMOD usage to non-DT boots and rely on clocksource_of_init() every time we boot with DT. While at that, also make sure that we don't disable the 32-counter device so it gets probed by its driver. Signed-off-by: Felipe Balbi --- arch/arm/mach-omap2/timer.c | 33 +++++++++++++-------------------- 1 file changed, 13 insertions(+), 20 deletions(-) diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 01452cb190cb..7c1b13fee68f 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -183,7 +183,8 @@ static struct device_node * __init omap_get_timer_dt(const struct of_device_id * of_get_property(np, "ti,timer-secure", NULL))) continue; - of_add_property(np, &device_disabled); + if (!of_device_is_compatible(np, "ti,omap-counter32k")) + of_add_property(np, &device_disabled); return np; } @@ -394,7 +395,6 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void) int ret; struct device_node *np = NULL; struct omap_hwmod *oh; - void __iomem *vbase; const char *oh_name = "counter_32k"; /* @@ -420,18 +420,6 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void) omap_hwmod_setup_one(oh_name); - if (np) { - vbase = of_iomap(np, 0); - of_node_put(np); - } else { - vbase = omap_hwmod_get_mpu_rt_va(oh); - } - - if (!vbase) { - pr_warn("%s: failed to get counter_32k resource\n", __func__); - return -ENXIO; - } - ret = omap_hwmod_enable(oh); if (ret) { pr_warn("%s: failed to enable counter_32k module (%d)\n", @@ -439,13 +427,18 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void) return ret; } - ret = omap_init_clocksource_32k(vbase); - if (ret) { - pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n", - __func__, ret); - omap_hwmod_idle(oh); - } + if (!of_have_populated_dt()) { + void __iomem *vbase; + vbase = omap_hwmod_get_mpu_rt_va(oh); + + ret = omap_init_clocksource_32k(vbase); + if (ret) { + pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n", + __func__, ret); + omap_hwmod_idle(oh); + } + } return ret; }