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[209.132.180.67]) by mx.google.com with ESMTP id vr10si16844033pbc.102.2015.09.09.23.06.50; Wed, 09 Sep 2015 23:06:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753368AbbIJGGp (ORCPT + 28 others); Thu, 10 Sep 2015 02:06:45 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:56945 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751109AbbIJGGg (ORCPT ); Thu, 10 Sep 2015 02:06:36 -0400 Received: from 172.24.1.47 (EHLO szxeml427-hub.china.huawei.com) ([172.24.1.47]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CSC43744; Thu, 10 Sep 2015 14:06:28 +0800 (CST) Received: from u105-115.huawei.com (10.141.105.115) by szxeml427-hub.china.huawei.com (10.82.67.182) with Microsoft SMTP Server id 14.3.235.1; Thu, 10 Sep 2015 14:06:14 +0800 From: Chen Feng To: , , CC: , , , , Subject: [PATCH 1/3] arm64: dts: Add reset dts config for Hisilicon Hi6220 SoC Date: Thu, 10 Sep 2015 14:06:11 +0800 Message-ID: <1441865173-104103-1-git-send-email-puck.chen@hisilicon.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-Originating-IP: [10.141.105.115] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: puck.chen@hisilicon.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.43 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add reset controller for hi6220 hikey-board. Signed-off-by: Chen Feng --- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 3f03380..09bb9d1 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -167,5 +167,12 @@ clocks = <&ao_ctrl 36>, <&ao_ctrl 36>; clock-names = "uartclk", "apb_pclk"; }; + + reset_ctrl: reset_ctrl@f7030304 { + compatible = "hisilicon,hisi_reset_ctl"; + reg = <0x0 0xf7030304 0x0 0x1000>; + #reset-cells = <1>; + }; + }; };