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[209.132.180.67]) by mx.google.com with ESMTP id a6si13589620pas.184.2015.09.09.14.19.14; Wed, 09 Sep 2015 14:19:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755512AbbIIVTF (ORCPT + 28 others); Wed, 9 Sep 2015 17:19:05 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:51596 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754676AbbIIVSp (ORCPT ); Wed, 9 Sep 2015 17:18:45 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id t89LIJEb009513; Wed, 9 Sep 2015 16:18:19 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id t89LII4s015989; Wed, 9 Sep 2015 16:18:19 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.224.2; Wed, 9 Sep 2015 16:18:10 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id t89LIIN5014749; Wed, 9 Sep 2015 16:18:18 -0500 From: Nishanth Menon To: Kevin Hilman , Tony Lindgren CC: , , , Nishanth Menon Subject: [PATCH 4/4] ARM: OMAP5: Cleanup options for SoC only build Date: Wed, 9 Sep 2015 16:18:14 -0500 Message-ID: <1441833494-32450-5-git-send-email-nm@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1441833494-32450-1-git-send-email-nm@ti.com> References: <1441833494-32450-1-git-send-email-nm@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: nm@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.182 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , OMAP5 SoC has Cortex-A15 which does not use TWD timer. It uses ARCH_TIMER instead, clean up unwanted configuration and enable OMAP_INTERCONNECT and OPP which is necessary for expected functionality on the SoC. Reported-by: Carlos Hernandez Reported-by: Felipe Balbi Signed-off-by: Nishanth Menon --- arch/arm/mach-omap2/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 403022a38607..b3a0dff67e3f 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -44,10 +44,11 @@ config SOC_OMAP5 select ARM_CPU_SUSPEND if PM select ARM_GIC select HAVE_ARM_SCU if SMP - select HAVE_ARM_TWD if SMP select HAVE_ARM_ARCH_TIMER select ARM_ERRATA_798181 if SMP + select OMAP_INTERCONNECT select OMAP_INTERCONNECT_BARRIER + select PM_OPP if PM config SOC_AM33XX bool "TI AM33XX"