From patchwork Thu Sep 3 19:24:00 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 53050 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-la0-f70.google.com (mail-la0-f70.google.com [209.85.215.70]) by patches.linaro.org (Postfix) with ESMTPS id 1B48F22E23 for ; Thu, 3 Sep 2015 19:24:35 +0000 (UTC) Received: by lamp12 with SMTP id p12sf18133812lam.2 for ; Thu, 03 Sep 2015 12:24:34 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:cc:subject:date:message-id :mime-version:content-type:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=vyknOr28OiJ3NGcmEgNdbv2SD7KLDbdlju3qt6UNz2A=; b=PrbiozmZQwW8jA31VXkROXiTrzDb+Z6o+Wm1GJko+5xKRmDbLpsoFcpf7+Ug8OA9Zj 9GHwFSI3R9X8ixer/sLeG1K5FLD5QEhmYKEqMBo5Vf2+CAZqenUJGRIzv6TcKwEaO9EP uNThyvWkeyzyPkukR8NRC0jLsxwffEwjpfJDJE/72GHlglwO2y+jySu4ItdYL/QvXzat 4Cw/MWkB2XgHU9Ml4ZOZ+BgZABmDIVNpO6IbMLjiPO0bycrOzkB8pILUPrZ1RiMRjU6d hIDT879YAVuLz1zAXo/AOxXWWfkDa5RpCYcWBswNcRJQuzGSM4HwFKcVVavp9JosOaoK rxdw== X-Gm-Message-State: ALoCoQnsR3hKV23GiYuk+9dRy3C2mFVkLXZM4VC4gA5UqhhVEzSsYQCnifzByMdFi48QuEO7l379 X-Received: by 10.152.26.101 with SMTP id k5mr11150571lag.9.1441308273897; Thu, 03 Sep 2015 12:24:33 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.28.100 with SMTP id a4ls253398lah.52.gmail; Thu, 03 Sep 2015 12:24:33 -0700 (PDT) X-Received: by 10.112.24.163 with SMTP id v3mr23615046lbf.101.1441308273700; Thu, 03 Sep 2015 12:24:33 -0700 (PDT) Received: from mail-lb0-f179.google.com (mail-lb0-f179.google.com. [209.85.217.179]) by mx.google.com with ESMTPS id q3si24003311laj.149.2015.09.03.12.24.33 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 03 Sep 2015 12:24:33 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.179 as permitted sender) client-ip=209.85.217.179; Received: by lbcao8 with SMTP id ao8so30208319lbc.3 for ; Thu, 03 Sep 2015 12:24:33 -0700 (PDT) X-Received: by 10.152.18.164 with SMTP id x4mr23826096lad.35.1441308273554; Thu, 03 Sep 2015 12:24:33 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.164.42 with SMTP id yn10csp1475749lbb; Thu, 3 Sep 2015 12:24:32 -0700 (PDT) X-Received: by 10.66.241.2 with SMTP id we2mr70647687pac.99.1441308272566; Thu, 03 Sep 2015 12:24:32 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id pz5si43048181pab.219.2015.09.03.12.24.31; Thu, 03 Sep 2015 12:24:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757576AbbICTYa (ORCPT + 28 others); Thu, 3 Sep 2015 15:24:30 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:41699 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754026AbbICTY1 (ORCPT ); Thu, 3 Sep 2015 15:24:27 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id t83JO2QS017043; Thu, 3 Sep 2015 14:24:02 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t83JO2LE023224; Thu, 3 Sep 2015 14:24:02 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.224.2; Thu, 3 Sep 2015 14:24:01 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id t83JO1Be016933; Thu, 3 Sep 2015 14:24:01 -0500 From: Nishanth Menon To: Tony Lindgren , =?UTF-8?q?Beno=C3=AEt=20Cousson?= CC: , , , , Nishanth Menon Subject: [PATCH] ARM: dts: am57xx-beagle-x15: Add wakeup irq for mcp79410 Date: Thu, 3 Sep 2015 14:24:00 -0500 Message-ID: <1441308240-26725-1-git-send-email-nm@ti.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: nm@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.179 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , With the support in the generic PM framework for wakeirq and capability added to the rtc-ds1307 driver to support this, we can now define the optional wakeup irq to allow the RTC to wakeup the system from low power modes as part of suspend. Signed-off-by: Nishanth Menon --- This patch depends on upcoming merge for RTC https://git.kernel.org/cgit/linux/kernel/git/abelloni/linux.git/log/?h=rtc-next&ofs=50 merge to master of: 9901c41bd019 rtc: ds1307: Support optional wakeup interrupt source 496a7ede6cac rtc: ds1307: Sort the headers e28475b15b65 rtc: ds1307: Switch to managed irq allocation 27a1dce6528a rtc: ds1307: Convert to threaded IRQ Tested with the above commits from linux-next: http://pastebin.ubuntu.com/12265857/ Could probably go in round 2 of merges for 4.3? arch/arm/boot/dts/am57xx-beagle-x15.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts index ede7fb73c717..8464f3cea280 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15.dts +++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts @@ -526,7 +526,8 @@ mcp_rtc: rtc@6f { compatible = "microchip,mcp7941x"; reg = <0x6f>; - interrupts = ; /* IRQ_SYS_1N */ + interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>, + <&dra7_pmx_core 0x424>; pinctrl-names = "default"; pinctrl-0 = <&mcp79410_pins_default>;