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[209.132.180.67]) by mx.google.com with ESMTP id le10si12651845pab.100.2015.04.03.09.28.44; Fri, 03 Apr 2015 09:28:45 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753293AbbDCQ2j (ORCPT + 27 others); Fri, 3 Apr 2015 12:28:39 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:41471 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753095AbbDCQ1V (ORCPT ); Fri, 3 Apr 2015 12:27:21 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id t33GRK9H011135; Fri, 3 Apr 2015 11:27:21 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t33GRJ59011997; Fri, 3 Apr 2015 11:27:19 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.224.2; Fri, 3 Apr 2015 11:27:19 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id t33GQnQ5024713; Fri, 3 Apr 2015 11:27:18 -0500 From: Kishon Vijay Abraham I To: CC: , Subject: [PATCH 17/20] phy: miphy365x: Use the generic phy type constants in dt-bindings/phy/phy.h Date: Fri, 3 Apr 2015 21:56:45 +0530 Message-ID: <1428078408-13344-18-git-send-email-kishon@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1428078408-13344-1-git-send-email-kishon@ti.com> References: <1428078408-13344-1-git-send-email-kishon@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: kishon@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.173 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Peter Griffin Now there are generic phy type constants declared in phy.h, migrate over to using them rather than defining our own. This change has been done as one atomic commit to be bisectable. Note: The values of the defines are the same, so there is no ABI breakage with this patch. Signed-off-by: Peter Griffin Acked-by: Rob Herring Acked-by: Lee Jones Acked-by: Maxime Coquelin Signed-off-by: Kishon Vijay Abraham I --- .../devicetree/bindings/phy/phy-miphy365x.txt | 8 ++++---- arch/arm/boot/dts/stih416.dtsi | 4 ++-- drivers/phy/phy-miphy365x.c | 14 +++++++------- include/dt-bindings/phy/phy-miphy365x.h | 14 -------------- 4 files changed, 13 insertions(+), 27 deletions(-) delete mode 100644 include/dt-bindings/phy/phy-miphy365x.h diff --git a/Documentation/devicetree/bindings/phy/phy-miphy365x.txt b/Documentation/devicetree/bindings/phy/phy-miphy365x.txt index 9802d5d..8772900 100644 --- a/Documentation/devicetree/bindings/phy/phy-miphy365x.txt +++ b/Documentation/devicetree/bindings/phy/phy-miphy365x.txt @@ -20,8 +20,8 @@ Required nodes : A sub-node is required for each channel the controller Required properties (port (child) node): - #phy-cells : Should be 1 (See second example) Cell after port phandle is device type from: - - MIPHY_TYPE_SATA - - MIPHY_TYPE_PCI + - PHY_TYPE_SATA + - PHY_TYPE_PCI - reg : Address and length of register sets for each device in "reg-names" - reg-names : The names of the register addresses corresponding to the @@ -68,10 +68,10 @@ property, containing a phandle to the phy port node and a device type. Example: -#include +#include sata0: sata@fe380000 { ... - phys = <&phy_port0 MIPHY_TYPE_SATA>; + phys = <&phy_port0 PHY_TYPE_SATA>; ... }; diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi index ea28eba..eeb7afe 100644 --- a/arch/arm/boot/dts/stih416.dtsi +++ b/arch/arm/boot/dts/stih416.dtsi @@ -10,7 +10,7 @@ #include "stih416-clock.dtsi" #include "stih416-pinctrl.dtsi" -#include +#include #include #include / { @@ -306,7 +306,7 @@ reg = <0xfe380000 0x1000>; interrupts = ; interrupt-names = "hostc"; - phys = <&phy_port0 MIPHY_TYPE_SATA>; + phys = <&phy_port0 PHY_TYPE_SATA>; phy-names = "sata-phy"; resets = <&powerdown STIH416_SATA0_POWERDOWN>, <&softreset STIH416_SATA0_SOFTRESET>; diff --git a/drivers/phy/phy-miphy365x.c b/drivers/phy/phy-miphy365x.c index 6c80154..98bffbc 100644 --- a/drivers/phy/phy-miphy365x.c +++ b/drivers/phy/phy-miphy365x.c @@ -25,7 +25,7 @@ #include #include -#include +#include #define HFC_TIMEOUT 100 @@ -176,7 +176,7 @@ static u8 rx_tx_spd[] = { static int miphy365x_set_path(struct miphy365x_phy *miphy_phy, struct miphy365x_dev *miphy_dev) { - bool sata = (miphy_phy->type == MIPHY_TYPE_SATA); + bool sata = (miphy_phy->type == PHY_TYPE_SATA); return regmap_update_bits(miphy_dev->regmap, miphy_phy->ctrlreg, @@ -430,7 +430,7 @@ static int miphy365x_init(struct phy *phy) } /* Initialise Miphy for PCIe or SATA */ - if (miphy_phy->type == MIPHY_TYPE_PCIE) + if (miphy_phy->type == PHY_TYPE_PCIE) ret = miphy365x_init_pcie_port(miphy_phy, miphy_dev); else ret = miphy365x_init_sata_port(miphy_phy, miphy_dev); @@ -454,8 +454,8 @@ int miphy365x_get_addr(struct device *dev, struct miphy365x_phy *miphy_phy, return ret; } - if (!((!strncmp(name, "sata", 4) && type == MIPHY_TYPE_SATA) || - (!strncmp(name, "pcie", 4) && type == MIPHY_TYPE_PCIE))) + if (!((!strncmp(name, "sata", 4) && type == PHY_TYPE_SATA) || + (!strncmp(name, "pcie", 4) && type == PHY_TYPE_PCIE))) return 0; miphy_phy->base = of_iomap(phynode, index); @@ -498,8 +498,8 @@ static struct phy *miphy365x_xlate(struct device *dev, miphy_phy->type = args->args[0]; - if (!(miphy_phy->type == MIPHY_TYPE_SATA || - miphy_phy->type == MIPHY_TYPE_PCIE)) { + if (!(miphy_phy->type == PHY_TYPE_SATA || + miphy_phy->type == PHY_TYPE_PCIE)) { dev_err(dev, "Unsupported device type: %d\n", miphy_phy->type); return ERR_PTR(-EINVAL); } diff --git a/include/dt-bindings/phy/phy-miphy365x.h b/include/dt-bindings/phy/phy-miphy365x.h deleted file mode 100644 index 8ef8aba..0000000 --- a/include/dt-bindings/phy/phy-miphy365x.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * This header provides constants for the phy framework - * based on the STMicroelectronics MiPHY365x. - * - * Author: Lee Jones - */ -#ifndef _DT_BINDINGS_PHY_MIPHY -#define _DT_BINDINGS_PHY_MIPHY - -#define MIPHY_TYPE_SATA 1 -#define MIPHY_TYPE_PCIE 2 -#define MIPHY_TYPE_USB 3 - -#endif /* _DT_BINDINGS_PHY_MIPHY */