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[2001:1868:205::9]) by mx.google.com with ESMTPS id l6si24500354pdo.116.2014.11.17.01.43.56 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 17 Nov 2014 01:43:57 -0800 (PST) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XqIpK-0007wH-H1; Mon, 17 Nov 2014 09:42:30 +0000 Received: from szxga01-in.huawei.com ([119.145.14.64]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XqIp0-0007Hw-Dd for linux-arm-kernel@lists.infradead.org; Mon, 17 Nov 2014 09:42:11 +0000 Received: from 172.24.2.119 (EHLO szxeml462-hub.china.huawei.com) ([172.24.2.119]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CEO10128; Mon, 17 Nov 2014 17:40:43 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml462-hub.china.huawei.com (10.82.67.205) with Microsoft SMTP Server id 14.3.158.1; Mon, 17 Nov 2014 17:40:32 +0800 From: Yijing Wang To: Bjorn Helgaas Subject: [RFC PATCH 06/16] PCI: Use u32 type to combine PCI domain and bus number Date: Mon, 17 Nov 2014 18:21:40 +0800 Message-ID: <1416219710-26088-7-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1416219710-26088-1-git-send-email-wangyijing@huawei.com> References: <1416219710-26088-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141117_014210_961063_82AAF78A X-CRM114-Status: GOOD ( 11.98 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [119.145.14.64 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [119.145.14.64 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders Cc: Liviu Dudau , Tony Luck , Russell King , linux-pci@vger.kernel.org, x86@kernel.org, linux-kernel@vger.kernel.org, Xinwei Hu , Thierry Reding , Suravee.Suthikulpanit@amd.com, Benjamin Herrenschmidt , Yijing Wang , linux-ia64@vger.kernel.org, Thomas Gleixner , Wuyun , linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: wangyijing@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.174 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Currently, we use int type for bus number in pci_create_root_bus() and pci_scan_root_bus(). Because bus number is <= 255, so we could change the bus number argument type to u32, and combine PCI domain and bus number, we will save the domain number in pci_host_bridge in later patch, and eliminate the arch specific pci_domain_nr(). Signed-off-by: Yijing Wang --- drivers/pci/probe.c | 11 ++++++----- include/linux/pci.h | 4 ++-- include/uapi/linux/pci.h | 3 +++ 3 files changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 623bfff..adf4d09 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -1895,7 +1895,7 @@ void __weak pcibios_remove_bus(struct pci_bus *bus) { } -struct pci_bus *pci_create_root_bus(struct device *parent, int bus, +struct pci_bus *pci_create_root_bus(struct device *parent, u32 db, struct pci_ops *ops, void *sysdata, struct list_head *resources) { int error; @@ -1906,6 +1906,7 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus, resource_size_t offset; char bus_addr[64]; char *fmt; + u8 bus = PCI_BUSNUM(db); b = pci_alloc_bus(NULL); if (!b) @@ -2063,7 +2064,7 @@ void pci_bus_release_busn_res(struct pci_bus *b) res, ret ? "can not be" : "is"); } -struct pci_bus *pci_scan_root_bus(struct device *parent, int bus, +struct pci_bus *pci_scan_root_bus(struct device *parent, u32 db, struct pci_ops *ops, void *sysdata, struct list_head *resources) { struct pci_host_bridge_window *window; @@ -2084,7 +2085,7 @@ struct pci_bus *pci_scan_root_bus(struct device *parent, int bus, } } - b = pci_create_root_bus(parent, bus, ops, sysdata, + b = pci_create_root_bus(parent, db, ops, sysdata, resources ? resources : &default_res); if (!b) return NULL; @@ -2092,8 +2093,8 @@ struct pci_bus *pci_scan_root_bus(struct device *parent, int bus, if (!found) { dev_info(&b->dev, "No busn resource found for root bus, will use [bus %02x-ff]\n", - bus); - pci_bus_insert_busn_res(b, bus, 255); + PCI_BUSNUM(db)); + pci_bus_insert_busn_res(b, PCI_BUSNUM(db), 255); } max = pci_scan_child_bus(b); diff --git a/include/linux/pci.h b/include/linux/pci.h index 4daef65..8b11b38 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -767,13 +767,13 @@ void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res, void pcibios_scan_specific_bus(int busn); struct pci_bus *pci_find_bus(int domain, int busnr); void pci_bus_add_devices(const struct pci_bus *bus); -struct pci_bus *pci_create_root_bus(struct device *parent, int bus, +struct pci_bus *pci_create_root_bus(struct device *parent, u32 bus, struct pci_ops *ops, void *sysdata, struct list_head *resources); int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax); int pci_bus_update_busn_res_end(struct pci_bus *b, int busmax); void pci_bus_release_busn_res(struct pci_bus *b); -struct pci_bus *pci_scan_root_bus(struct device *parent, int bus, +struct pci_bus *pci_scan_root_bus(struct device *parent, u32 bus, struct pci_ops *ops, void *sysdata, struct list_head *resources); struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, diff --git a/include/uapi/linux/pci.h b/include/uapi/linux/pci.h index 3c292bc..89c6f15 100644 --- a/include/uapi/linux/pci.h +++ b/include/uapi/linux/pci.h @@ -30,6 +30,9 @@ #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) #define PCI_FUNC(devfn) ((devfn) & 0x07) +#define PCI_DOMAIN(db) ((db) >> 16) +#define PCI_BUSNUM(db) ((db) & 0xffff) +#define PCI_DOMBUS(domain, bus) (((domain) << 16) | (bus)) /* Ioctls for /proc/bus/pci/X/Y nodes. */ #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)