From patchwork Thu Nov 6 09:54:19 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime COQUELIN X-Patchwork-Id: 40264 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wi0-f198.google.com (mail-wi0-f198.google.com [209.85.212.198]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 0675924237 for ; Thu, 6 Nov 2014 09:55:18 +0000 (UTC) Received: by mail-wi0-f198.google.com with SMTP id n3sf429952wiv.5 for ; Thu, 06 Nov 2014 01:55:17 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:sender:precedence:list-id:x-original-sender :x-original-authentication-results:mailing-list:list-post:list-help :list-archive:list-unsubscribe; bh=MzFwqhKZ3rdKbICzyKXfZJgCzsQ+8iObYfW086NuudM=; b=cYWscvrSIFNBLSdKSm8GFEeH9zT7GceEp5ABOvUEPqQ7erzClh3gddUYw3RaE33a6W vmriZnMXp4bOoB9q+eUTXAsIxy2/o7HBS8gS/g5J/PugyK9UUT1oDYjTw8hinVyIk4w/ J8oCOx6vjS3LpT5Hv1ro3Z/1xXA36GTTlR+h48I71X0gji0EtnZihrMt4BahoffqKrFZ H7cOVsFyb+tTuIQrGxMVYt5owvTY6EJ/EBmm49i2bWYXU1K+zynZRyMDIzN61J9B2iHZ /ZQhVarXUQuGC1HzyD0qW1WDMnA43/rnHNghz9ZksrKh23Oil3ia8lUxZTaDhPXw1gqv uzyQ== X-Gm-Message-State: ALoCoQmWAkIMYP4YiaFpo9B7Z825lEUZyuEGJsW089AGOtUZo96R+exN40pcq/6tJABRHX7gyAal X-Received: by 10.194.61.243 with SMTP id t19mr326191wjr.5.1415267717349; Thu, 06 Nov 2014 01:55:17 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.153.5.43 with SMTP id cj11ls58177lad.85.gmail; Thu, 06 Nov 2014 01:55:17 -0800 (PST) X-Received: by 10.152.36.33 with SMTP id n1mr3986615laj.6.1415267717150; Thu, 06 Nov 2014 01:55:17 -0800 (PST) Received: from mail-la0-f41.google.com (mail-la0-f41.google.com. [209.85.215.41]) by mx.google.com with ESMTPS id pi7si10888402lbb.15.2014.11.06.01.55.17 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 06 Nov 2014 01:55:17 -0800 (PST) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.41 as permitted sender) client-ip=209.85.215.41; Received: by mail-la0-f41.google.com with SMTP id s18so2313349lam.28 for ; Thu, 06 Nov 2014 01:55:17 -0800 (PST) X-Received: by 10.152.29.8 with SMTP id f8mr3947365lah.56.1415267717022; Thu, 06 Nov 2014 01:55:17 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.184.201 with SMTP id ew9csp19714lbc; Thu, 6 Nov 2014 01:55:16 -0800 (PST) X-Received: by 10.68.65.10 with SMTP id t10mr2609787pbs.156.1415267715364; Thu, 06 Nov 2014 01:55:15 -0800 (PST) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id xy2si5406880pbb.122.2014.11.06.01.55.14 for ; Thu, 06 Nov 2014 01:55:15 -0800 (PST) Received-SPF: none (google.com: stable-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751263AbaKFJzN (ORCPT + 1 other); Thu, 6 Nov 2014 04:55:13 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:34298 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751054AbaKFJzM (ORCPT ); Thu, 6 Nov 2014 04:55:12 -0500 Received: from pps.filterd (m0046670.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.14.5/8.14.5) with SMTP id sA69ndGM013389; Thu, 6 Nov 2014 10:54:31 +0100 Received: from beta.dmz-us.st.com (beta.dmz-us.st.com [167.4.1.35]) by mx07-00178001.pphosted.com with ESMTP id 1qetgeuuea-1 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 06 Nov 2014 10:54:31 +0100 Received: from zeta.dmz-us.st.com (ns4.st.com [167.4.16.71]) by beta.dmz-us.st.com (STMicroelectronics) with ESMTP id 1DEE526; Thu, 6 Nov 2014 09:54:24 +0000 (GMT) Received: from mail7.sgp.st.com (unknown [164.129.223.81]) by zeta.dmz-us.st.com (STMicroelectronics) with ESMTP id E89E43F; Thu, 6 Nov 2014 09:54:21 +0000 (GMT) Received: from lmecul0520.lme.st.com (lmecul0520.lme.st.com [10.201.23.80]) by mail7.sgp.st.com (MOS 4.3.3-GA) with ESMTP id BZR63389 (AUTH lme00137); Thu, 6 Nov 2014 10:54:11 +0100 From: Maxime COQUELIN To: linux@rasmusvillemoes.dk, gong.chen@linux.intel.com, Peter Zijlstra , Ingo Molnar , " Paul E. McKenney" , tytso@mit.edu, linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: kernel@stlinux.com, maxime.coquelin@st.com, eric.paire@st.com Subject: [PATCH v4] bitops: Fix shift overflow in GENMASK macros Date: Thu, 6 Nov 2014 10:54:19 +0100 Message-Id: <1415267659-10563-1-git-send-email-maxime.coquelin@st.com> X-Mailer: git-send-email 1.9.1 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:5.12.52, 1.0.28, 0.0.0000 definitions=2014-11-06_04:2014-11-05, 2014-11-06, 1970-01-01 signatures=0 Sender: stable-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: stable@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: maxime.coquelin@st.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.41 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , On some 32 bits architectures, including x86, GENMASK(31, 0) returns 0 instead of the expected ~0UL. This is the same on some 64 bits architectures with GENMASK_ULL(63, 0). This is due to an overflow in the shift operand, 1 << 32 for GENMASK, 1 << 64 for GENMASK_ULL. Fixes: 10ef6b0dffe404bcc54e94cb2ca1a5b18445a66b Cc: #v3.13+ Reported-by: Eric Paire Suggested-by: Rasmus Villemoes Signed-off-by: Maxime Coquelin --- include/linux/bitops.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/include/linux/bitops.h b/include/linux/bitops.h index be5fd38..5d858e0 100644 --- a/include/linux/bitops.h +++ b/include/linux/bitops.h @@ -18,8 +18,11 @@ * position @h. For example * GENMASK_ULL(39, 21) gives us the 64bit vector 0x000000ffffe00000. */ -#define GENMASK(h, l) (((U32_C(1) << ((h) - (l) + 1)) - 1) << (l)) -#define GENMASK_ULL(h, l) (((U64_C(1) << ((h) - (l) + 1)) - 1) << (l)) +#define GENMASK(h, l) \ + (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h)))) + +#define GENMASK_ULL(h, l) \ + (((~0ULL) << (l)) & (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h)))) extern unsigned int __sw_hweight8(unsigned int w); extern unsigned int __sw_hweight16(unsigned int w);