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[209.132.180.67]) by mx.google.com with ESMTP id ba2si1264518pdb.239.2014.10.28.06.32.47 for ; Tue, 28 Oct 2014 06:32:48 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753957AbaJ1Nc3 (ORCPT + 26 others); Tue, 28 Oct 2014 09:32:29 -0400 Received: from mail-pa0-f48.google.com ([209.85.220.48]:57640 "EHLO mail-pa0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753878AbaJ1Nc0 (ORCPT ); Tue, 28 Oct 2014 09:32:26 -0400 Received: by mail-pa0-f48.google.com with SMTP id ey11so741673pad.21 for ; Tue, 28 Oct 2014 06:32:26 -0700 (PDT) X-Received: by 10.66.66.136 with SMTP id f8mr3363824pat.55.1414503146267; Tue, 28 Oct 2014 06:32:26 -0700 (PDT) Received: from localhost.localdomain ([218.17.215.175]) by mx.google.com with ESMTPSA id nq2sm1712627pdb.74.2014.10.28.06.32.23 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 28 Oct 2014 06:32:25 -0700 (PDT) From: Xia Kaixu To: rmk+kernel@arm.linux.org.uk, arm@kernel.org Cc: kaixu.xia@linaro.org, arnd@arndb.de, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 4/5] ARM: allow errata and XIP options to be enabled without ARCH_MULTIPLATFORM_STRICT Date: Tue, 28 Oct 2014 21:31:34 +0800 Message-Id: <1414503095-25986-5-git-send-email-kaixu.xia@linaro.org> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1414503095-25986-1-git-send-email-kaixu.xia@linaro.org> References: <1414503095-25986-1-git-send-email-kaixu.xia@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: kaixu.xia@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.169 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , With the ARCH_MULTIPLATFORM_STRICT option, it becomes much easier to enable the ERRATA options when we know at configuration time that we don't care about the generic case. The previous configuration makes XIP_KERNEL option fundamentally non-MULTIPLATFORM, but it's still valid to select it when building for !ARCH_MULTIPLATFORM_STRICT and selecting only the one machine that you want to run on. So allow ARM_ERRATA and XIP_KERNEL options to be enabled without ARCH_MULTIPLATFORM_STRICT. Signed-off-by: Xia Kaixu --- arch/arm/Kconfig | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 50762cc..14d0dce 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1091,7 +1091,7 @@ config ARM_ERRATA_430973 config ARM_ERRATA_458693 bool "ARM errata: Processor deadlock when a false hazard is created" depends on CPU_V7 - depends on !ARCH_MULTIPLATFORM + depends on !ARCH_MULTIPLATFORM_STRICT help This option enables the workaround for the 458693 Cortex-A8 (r2p0) erratum. For very specific sequences of memory operations, it is @@ -1105,7 +1105,7 @@ config ARM_ERRATA_458693 config ARM_ERRATA_460075 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" depends on CPU_V7 - depends on !ARCH_MULTIPLATFORM + depends on !ARCH_MULTIPLATFORM_STRICT help This option enables the workaround for the 460075 Cortex-A8 (r2p0) erratum. Any asynchronous access to the L2 cache may encounter a @@ -1118,7 +1118,7 @@ config ARM_ERRATA_460075 config ARM_ERRATA_742230 bool "ARM errata: DMB operation may be faulty" depends on CPU_V7 && SMP - depends on !ARCH_MULTIPLATFORM + depends on !ARCH_MULTIPLATFORM_STRICT help This option enables the workaround for the 742230 Cortex-A9 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction @@ -1131,7 +1131,7 @@ config ARM_ERRATA_742230 config ARM_ERRATA_742231 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" depends on CPU_V7 && SMP - depends on !ARCH_MULTIPLATFORM + depends on !ARCH_MULTIPLATFORM_STRICT help This option enables the workaround for the 742231 Cortex-A9 (r2p0..r2p2) erratum. Under certain conditions, specific to the @@ -1168,7 +1168,7 @@ config ARM_ERRATA_720789 config ARM_ERRATA_743622 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" depends on CPU_V7 - depends on !ARCH_MULTIPLATFORM + depends on !ARCH_MULTIPLATFORM_STRICT help This option enables the workaround for the 743622 Cortex-A9 (r2p*) erratum. Under very rare conditions, a faulty @@ -1182,7 +1182,7 @@ config ARM_ERRATA_743622 config ARM_ERRATA_751472 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" depends on CPU_V7 - depends on !ARCH_MULTIPLATFORM + depends on !ARCH_MULTIPLATFORM_STRICT help This option enables the workaround for the 751472 Cortex-A9 (prior to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the @@ -1987,7 +1987,7 @@ endchoice config XIP_KERNEL bool "Kernel Execute-In-Place from ROM" - depends on !ARM_LPAE && !ARCH_MULTIPLATFORM + depends on !ARM_LPAE && !ARCH_MULTIPLATFORM_STRICT help Execute-In-Place allows the kernel to run from non-volatile storage directly addressable by the CPU, such as NOR flash. This saves RAM