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[209.132.180.67]) by mx.google.com with ESMTP id om9si2925574pdb.171.2014.10.23.18.47.17 for ; Thu, 23 Oct 2014 18:47:22 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752601AbaJXBrO (ORCPT + 26 others); Thu, 23 Oct 2014 21:47:14 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:10918 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751102AbaJXBrN (ORCPT ); Thu, 23 Oct 2014 21:47:13 -0400 Received: from 172.24.2.119 (EHLO lggeml423-hub.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CBE43814; Fri, 24 Oct 2014 09:47:09 +0800 (CST) Received: from kernel-host.huawei (10.107.197.247) by lggeml423-hub.china.huawei.com (10.72.61.33) with Microsoft SMTP Server id 14.3.158.1; Fri, 24 Oct 2014 09:47:01 +0800 From: Wang Nan To: , , Arnaldo Carvalho de Melo CC: , Subject: [PATCH v3] perf tools: makes CPUINFO_PROC to array for different kernel version Date: Fri, 24 Oct 2014 09:45:26 +0800 Message-ID: <1414115126-7479-1-git-send-email-wangnan0@huawei.com> X-Mailer: git-send-email 1.8.4 MIME-Version: 1.0 X-Originating-IP: [10.107.197.247] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: wangnan0@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.44 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , After kernel 3.7 (commit b4b8f770eb10a1bccaf8aa0ec1956e2dd7ed1e0a), /proc/cpuinfo replaces 'Processor' to 'model name'. This patch makes CPUINFO_PROC to an array and provides two choices for ARM, makes it compatible for different kernel version. v1 -> v2: minor changes as suggested by Namhyung Kim: - Doesn't pass @h and @evlist to __write_cpudesc; - Coding style fix. v2 -> v3: - Rebase: git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git perf/core Signed-off-by: Wang Nan Acked-by: Namhyung Kim Cc: Arnaldo Carvalho de Melo --- tools/perf/perf-sys.h | 30 +++++++++++++++--------------- tools/perf/util/header.c | 27 +++++++++++++++++++++------ 2 files changed, 36 insertions(+), 21 deletions(-) diff --git a/tools/perf/perf-sys.h b/tools/perf/perf-sys.h index 937e432..a3b13d7 100644 --- a/tools/perf/perf-sys.h +++ b/tools/perf/perf-sys.h @@ -13,7 +13,7 @@ #define wmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory") #define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory") #define cpu_relax() asm volatile("rep; nop" ::: "memory"); -#define CPUINFO_PROC "model name" +#define CPUINFO_PROC {"model name"} #ifndef __NR_perf_event_open # define __NR_perf_event_open 336 #endif @@ -30,7 +30,7 @@ #define wmb() asm volatile("sfence" ::: "memory") #define rmb() asm volatile("lfence" ::: "memory") #define cpu_relax() asm volatile("rep; nop" ::: "memory"); -#define CPUINFO_PROC "model name" +#define CPUINFO_PROC {"model name"} #ifndef __NR_perf_event_open # define __NR_perf_event_open 298 #endif @@ -47,14 +47,14 @@ #define mb() asm volatile ("sync" ::: "memory") #define wmb() asm volatile ("sync" ::: "memory") #define rmb() asm volatile ("sync" ::: "memory") -#define CPUINFO_PROC "cpu" +#define CPUINFO_PROC {"cpu"} #endif #ifdef __s390__ #define mb() asm volatile("bcr 15,0" ::: "memory") #define wmb() asm volatile("bcr 15,0" ::: "memory") #define rmb() asm volatile("bcr 15,0" ::: "memory") -#define CPUINFO_PROC "vendor_id" +#define CPUINFO_PROC {"vendor_id"} #endif #ifdef __sh__ @@ -67,14 +67,14 @@ # define wmb() asm volatile("" ::: "memory") # define rmb() asm volatile("" ::: "memory") #endif -#define CPUINFO_PROC "cpu type" +#define CPUINFO_PROC {"cpu type"} #endif #ifdef __hppa__ #define mb() asm volatile("" ::: "memory") #define wmb() asm volatile("" ::: "memory") #define rmb() asm volatile("" ::: "memory") -#define CPUINFO_PROC "cpu" +#define CPUINFO_PROC {"cpu"} #endif #ifdef __sparc__ @@ -87,14 +87,14 @@ #endif #define wmb() asm volatile("":::"memory") #define rmb() asm volatile("":::"memory") -#define CPUINFO_PROC "cpu" +#define CPUINFO_PROC {"cpu"} #endif #ifdef __alpha__ #define mb() asm volatile("mb" ::: "memory") #define wmb() asm volatile("wmb" ::: "memory") #define rmb() asm volatile("mb" ::: "memory") -#define CPUINFO_PROC "cpu model" +#define CPUINFO_PROC {"cpu model"} #endif #ifdef __ia64__ @@ -102,7 +102,7 @@ #define wmb() asm volatile ("mf" ::: "memory") #define rmb() asm volatile ("mf" ::: "memory") #define cpu_relax() asm volatile ("hint @pause" ::: "memory") -#define CPUINFO_PROC "model name" +#define CPUINFO_PROC {"model name"} #endif #ifdef __arm__ @@ -113,7 +113,7 @@ #define mb() ((void(*)(void))0xffff0fa0)() #define wmb() ((void(*)(void))0xffff0fa0)() #define rmb() ((void(*)(void))0xffff0fa0)() -#define CPUINFO_PROC "Processor" +#define CPUINFO_PROC {"model name", "Processor"} #endif #ifdef __aarch64__ @@ -133,28 +133,28 @@ : "memory") #define wmb() mb() #define rmb() mb() -#define CPUINFO_PROC "cpu model" +#define CPUINFO_PROC {"cpu model"} #endif #ifdef __arc__ #define mb() asm volatile("" ::: "memory") #define wmb() asm volatile("" ::: "memory") #define rmb() asm volatile("" ::: "memory") -#define CPUINFO_PROC "Processor" +#define CPUINFO_PROC {"Processor"} #endif #ifdef __metag__ #define mb() asm volatile("" ::: "memory") #define wmb() asm volatile("" ::: "memory") #define rmb() asm volatile("" ::: "memory") -#define CPUINFO_PROC "CPU" +#define CPUINFO_PROC {"CPU"} #endif #ifdef __xtensa__ #define mb() asm volatile("memw" ::: "memory") #define wmb() asm volatile("memw" ::: "memory") #define rmb() asm volatile("" ::: "memory") -#define CPUINFO_PROC "core ID" +#define CPUINFO_PROC {"core ID"} #endif #ifdef __tile__ @@ -162,7 +162,7 @@ #define wmb() asm volatile ("mf" ::: "memory") #define rmb() asm volatile ("mf" ::: "memory") #define cpu_relax() asm volatile ("mfspr zero, PASS" ::: "memory") -#define CPUINFO_PROC "model name" +#define CPUINFO_PROC {"model name"} #endif #define barrier() asm volatile ("" ::: "memory") diff --git a/tools/perf/util/header.c b/tools/perf/util/header.c index 39b80ac..0ecf4a3 100644 --- a/tools/perf/util/header.c +++ b/tools/perf/util/header.c @@ -579,16 +579,12 @@ static int write_version(int fd, struct perf_header *h __maybe_unused, return do_write_string(fd, perf_version_string); } -static int write_cpudesc(int fd, struct perf_header *h __maybe_unused, - struct perf_evlist *evlist __maybe_unused) +static int __write_cpudesc(int fd, const char *cpuinfo_proc) { -#ifndef CPUINFO_PROC -#define CPUINFO_PROC NULL -#endif FILE *file; char *buf = NULL; char *s, *p; - const char *search = CPUINFO_PROC; + const char *search = cpuinfo_proc; size_t len = 0; int ret = -1; @@ -640,6 +636,25 @@ done: return ret; } +static int write_cpudesc(int fd, struct perf_header *h __maybe_unused, + struct perf_evlist *evlist __maybe_unused) +{ +#ifndef CPUINFO_PROC +#define CPUINFO_PROC {"model name", } +#endif + const char *cpuinfo_procs[] = CPUINFO_PROC; + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(cpuinfo_procs); i++) { + int ret; + ret = __write_cpudesc(fd, cpuinfo_procs[i]); + if (ret >= 0) + return ret; + } + return -1; +} + + static int write_nrcpus(int fd, struct perf_header *h __maybe_unused, struct perf_evlist *evlist __maybe_unused) {