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[209.132.180.67]) by mx.google.com with ESMTP id go10si14416830pbd.144.2014.10.14.19.29.26 for ; Tue, 14 Oct 2014 19:29:27 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756026AbaJOC3N (ORCPT + 27 others); Tue, 14 Oct 2014 22:29:13 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:40018 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932807AbaJOC0I (ORCPT ); Tue, 14 Oct 2014 22:26:08 -0400 Received: from 172.24.2.119 (EHLO szxeml412-hub.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CAT35439; Wed, 15 Oct 2014 10:26:03 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml412-hub.china.huawei.com (10.82.67.91) with Microsoft SMTP Server id 14.3.158.1; Wed, 15 Oct 2014 10:25:52 +0800 From: Yijing Wang To: Bjorn Helgaas CC: , , Xinwei Hu , Wuyun , , Russell King , , , , , Arnd Bergmann , Thomas Gleixner , "Konrad Rzeszutek Wilk" , , Joerg Roedel , , , Benjamin Herrenschmidt , , , Sebastian Ott , "Tony Luck" , , "David S. Miller" , , Chris Metcalf , Ralf Baechle , Lucas Stach , David Vrabel , "Sergei Shtylyov" , Michael Ellerman , Thierry Reding , "Thomas Petazzoni" , Liviu Dudau , Yijing Wang Subject: [PATCH v3 21/27] Powerpc/MSI: Use MSI chip framework to configure MSI/MSI-X irq Date: Wed, 15 Oct 2014 11:07:09 +0800 Message-ID: <1413342435-7876-22-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1413342435-7876-1-git-send-email-wangyijing@huawei.com> References: <1413342435-7876-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: wangyijing@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.54 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Use MSI chip framework instead of arch MSI functions to configure MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework. Signed-off-by: Yijing Wang Acked-by: Michael Ellerman (for powerpc) --- Hi Michael, I dropped the Acked-by , because this version has a lot changes compared to last. So, I guess you may want to check it again. --- arch/powerpc/include/asm/pci-bridge.h | 15 +++++++++++++++ arch/powerpc/kernel/msi.c | 12 ++++++++++-- arch/powerpc/kernel/pci-common.c | 3 +++ 3 files changed, 28 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h index 4ca90a3..233553e 100644 --- a/arch/powerpc/include/asm/pci-bridge.h +++ b/arch/powerpc/include/asm/pci-bridge.h @@ -32,6 +32,10 @@ struct pci_controller { int self_busno; struct resource busn; +#ifdef CONFIG_PCI_MSI + struct msi_chip *msi_chip; +#endif + void __iomem *io_base_virt; #ifdef CONFIG_PPC64 void *io_base_alloc; @@ -94,6 +98,17 @@ struct pci_controller { void *private_data; }; +#ifdef CONFIG_PCI_MSI +extern struct msi_chip ppc_msi_chip; + +static inline struct msi_chip *pci_msi_chip(struct pci_bus *bus) +{ + struct pci_controller *hose = bus->sysdata; + + return hose->msi_chip; +} +#endif + /* These are used for config access before all the PCI probing has been done. */ extern int early_read_config_byte(struct pci_controller *hose, int bus, diff --git a/arch/powerpc/kernel/msi.c b/arch/powerpc/kernel/msi.c index 71bd161..f38b67c 100644 --- a/arch/powerpc/kernel/msi.c +++ b/arch/powerpc/kernel/msi.c @@ -13,7 +13,8 @@ #include -int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) +static int ppc_setup_msi_irqs(struct msi_chip *chip, + struct pci_dev *dev, int nvec, int type) { if (!ppc_md.setup_msi_irqs || !ppc_md.teardown_msi_irqs) { pr_debug("msi: Platform doesn't provide MSI callbacks.\n"); @@ -27,7 +28,13 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) return ppc_md.setup_msi_irqs(dev, nvec, type); } -void arch_teardown_msi_irqs(struct pci_dev *dev) +static void ppc_teardown_msi_irqs(struct msi_chip *chip, + struct pci_dev *dev) { ppc_md.teardown_msi_irqs(dev); } + +struct msi_chip ppc_msi_chip = { + .setup_irqs = ppc_setup_msi_irqs, + .teardown_irqs = ppc_teardown_msi_irqs, +}; diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c index b2814e2..9f18b42 100644 --- a/arch/powerpc/kernel/pci-common.c +++ b/arch/powerpc/kernel/pci-common.c @@ -1594,6 +1594,9 @@ void pcibios_scan_phb(struct pci_controller *hose) /* Wire up PHB bus resources */ pcibios_setup_phb_resources(hose, &resources); +#ifdef CONFIG_PCI_MSI + hose->msi_chip = &ppc_msi_chip; +#endif hose->busn.start = hose->first_busno; hose->busn.end = hose->last_busno; hose->busn.flags = IORESOURCE_BUS;