From patchwork Thu Sep 25 03:14:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: wangyijing X-Patchwork-Id: 37886 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wi0-f197.google.com (mail-wi0-f197.google.com [209.85.212.197]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 02A4220063 for ; Thu, 25 Sep 2014 02:51:29 +0000 (UTC) Received: by mail-wi0-f197.google.com with SMTP id ho1sf4159871wib.0 for ; Wed, 24 Sep 2014 19:51:29 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe:content-type; bh=m1z6ddlphehCabcL4tFjaInH/OdCGehfG9lpeXyoc64=; b=BdfN1NAX2oMF9g/qm1d2P/N4xVgoBQMIfN3Zq92v7uGjNqzG8MnWKlrlbCN0BMI04x S6WaeJQ+lqXGH9mR7W7+mLRigOwVi2eLLL1ARezbOhV6k0FcaXEecgtOCVc38Ncot5Ff 02TFcBf1jN0Lkcfpfb4LUxcl1VScLyZDAQBDFg7PcI4/fWuX9zmfDcCyKUXU3dOct9GI 55LLwrXbuSDVryumL8gD+l9HhXuLxJ/XkpK/OeHfELaPdXXBa4wzemY6s67ImH0UgcA3 aZRZz60GzqP/oy3LRUPnU5EQ5K/VmbB/MxoHAP/F+aXqwdhjFbZjRBiEBVRARBZtyamk mMxA== X-Gm-Message-State: ALoCoQkIW/ib1iQce62xJdDzQHveLkqVVkH/W4phnQWYgKfedRLlFqhTgZf+K/rGXAIF+/onFKlg X-Received: by 10.194.121.72 with SMTP id li8mr1603504wjb.1.1411613489224; Wed, 24 Sep 2014 19:51:29 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.8.41 with SMTP id o9ls230090laa.52.gmail; Wed, 24 Sep 2014 19:51:29 -0700 (PDT) X-Received: by 10.112.163.103 with SMTP id yh7mr9535236lbb.73.1411613489039; Wed, 24 Sep 2014 19:51:29 -0700 (PDT) Received: from mail-la0-f42.google.com (mail-la0-f42.google.com [209.85.215.42]) by mx.google.com with ESMTPS id m10si1050952lam.90.2014.09.24.19.51.29 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 24 Sep 2014 19:51:29 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.42 as permitted sender) client-ip=209.85.215.42; Received: by mail-la0-f42.google.com with SMTP id hz20so11800141lab.1 for ; Wed, 24 Sep 2014 19:51:29 -0700 (PDT) X-Received: by 10.152.197.35 with SMTP id ir3mr10377189lac.82.1411613488964; Wed, 24 Sep 2014 19:51:28 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.130.169 with SMTP id of9csp683231lbb; Wed, 24 Sep 2014 19:51:28 -0700 (PDT) X-Received: by 10.70.119.105 with SMTP id kt9mr793927pdb.7.1411613487338; Wed, 24 Sep 2014 19:51:27 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ck1si1104935pbc.174.2014.09.24.19.51.26 for ; Wed, 24 Sep 2014 19:51:27 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753183AbaIYCvX (ORCPT + 27 others); Wed, 24 Sep 2014 22:51:23 -0400 Received: from szxga01-in.huawei.com ([119.145.14.64]:37208 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752961AbaIYCvJ (ORCPT ); Wed, 24 Sep 2014 22:51:09 -0400 Received: from 172.24.2.119 (EHLO szxeml409-hub.china.huawei.com) ([172.24.2.119]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CCC72767; Thu, 25 Sep 2014 10:50:58 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml409-hub.china.huawei.com (10.82.67.136) with Microsoft SMTP Server id 14.3.158.1; Thu, 25 Sep 2014 10:50:48 +0800 From: Yijing Wang To: Bjorn Helgaas CC: , , Xinwei Hu , Wuyun , , Russell King , , , , , Arnd Bergmann , Thomas Gleixner , "Konrad Rzeszutek Wilk" , , Joerg Roedel , , , Benjamin Herrenschmidt , , , Sebastian Ott , "Tony Luck" , , "David S. Miller" , , Chris Metcalf , Ralf Baechle , Lucas Stach , David Vrabel , "Sergei Shtylyov" , Michael Ellerman , Thierry Reding , "Thomas Petazzoni" , Yijing Wang Subject: [PATCH v2 19/22] IA64/MSI: Use MSI chip framework to configure MSI/MSI-X irq Date: Thu, 25 Sep 2014 11:14:29 +0800 Message-ID: <1411614872-4009-20-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> References: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: wangyijing@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.42 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Use MSI chip framework instead of arch MSI functions to configure MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework. Signed-off-by: Yijing Wang --- arch/ia64/kernel/msi_ia64.c | 18 ++++++++++++++---- 1 files changed, 14 insertions(+), 4 deletions(-) diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c index 4efe748..55ac859 100644 --- a/arch/ia64/kernel/msi_ia64.c +++ b/arch/ia64/kernel/msi_ia64.c @@ -112,15 +112,15 @@ static struct irq_chip ia64_msi_chip = { }; -int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) +static int arch_ia64_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) { if (platform_setup_msi_irq) - return platform_setup_msi_irq(pdev, desc); + return platform_setup_msi_irq(dev, desc); - return ia64_setup_msi_irq(pdev, desc); + return ia64_setup_msi_irq(dev, desc); } -void arch_teardown_msi_irq(unsigned int irq) +static void arch_ia64_teardown_msi_irq(unsigned int irq) { if (platform_teardown_msi_irq) return platform_teardown_msi_irq(irq); @@ -128,6 +128,16 @@ void arch_teardown_msi_irq(unsigned int irq) return ia64_teardown_msi_irq(irq); } +static struct msi_chip chip = { + .setup_irq = arch_ia64_setup_msi_irq, + .teardown_irq = arch_ia64_teardown_msi_irq, +}; + +struct msi_chip *arch_find_msi_chip(struct pci_dev *dev) +{ + return &chip; +} + #ifdef CONFIG_INTEL_IOMMU #ifdef CONFIG_SMP static int dmar_msi_set_affinity(struct irq_data *data,