From patchwork Thu Sep 25 03:14:25 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: wangyijing X-Patchwork-Id: 37894 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-la0-f69.google.com (mail-la0-f69.google.com [209.85.215.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 697B620063 for ; Thu, 25 Sep 2014 02:54:31 +0000 (UTC) Received: by mail-la0-f69.google.com with SMTP id q1sf59851lam.0 for ; Wed, 24 Sep 2014 19:54:30 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe:content-type; bh=JdA6n5Wuq1zO1ARe8FgP0Qx9JTrACtLpsNcRB2na0Sc=; b=FtMi8biR+KmAf7L8pDoEbU6WryS5raGYwZ8EeAXigiVQvmxYHxh+9QqhpX13c6XL11 BnR9i/2mwl8dNiT5LxqypNrav6Iya4Z63YAEnNgtY6S9hFIMroYsiZ/gNU2DjSMFu9wv VHo6ENw8m0QU9LzkR4Gi9TS4erueCKZUTWs3FjF2HdvjGakrjtuPc5QlrFRs/YJms84Y cv7U2Vsz14tgJOI1qwr/jM9nyb5KMcDXXf+nBUIuyR7EqT9NW/WuzoO8e5xEriCDcppu sfdkv+L/7J9o4tPlFdV9s8USH9cEs8vbzXeCARLVtYEmq3fUgTAkZIGe2Zih8nGzZTFu S3jw== X-Gm-Message-State: ALoCoQkzNov9Wve5q2EMtAlL/JO+DlpGZ/O/wXZptfhM31QYWVQZqfDOwKUnwPdkAALVxQhUioj7 X-Received: by 10.112.163.104 with SMTP id yh8mr1599017lbb.5.1411613669860; Wed, 24 Sep 2014 19:54:29 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.161.225 with SMTP id xv1ls220806lab.43.gmail; Wed, 24 Sep 2014 19:54:29 -0700 (PDT) X-Received: by 10.152.204.231 with SMTP id lb7mr10016715lac.44.1411613669385; Wed, 24 Sep 2014 19:54:29 -0700 (PDT) Received: from mail-lb0-f173.google.com (mail-lb0-f173.google.com [209.85.217.173]) by mx.google.com with ESMTPS id p1si1033854lap.104.2014.09.24.19.54.29 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 24 Sep 2014 19:54:29 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.173 as permitted sender) client-ip=209.85.217.173; Received: by mail-lb0-f173.google.com with SMTP id 10so10013043lbg.18 for ; Wed, 24 Sep 2014 19:54:29 -0700 (PDT) X-Received: by 10.152.4.97 with SMTP id j1mr9972718laj.73.1411613669318; Wed, 24 Sep 2014 19:54:29 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.130.169 with SMTP id of9csp683442lbb; Wed, 24 Sep 2014 19:54:28 -0700 (PDT) X-Received: by 10.67.23.136 with SMTP id ia8mr13750564pad.125.1411613667803; Wed, 24 Sep 2014 19:54:27 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id cg2si1343436pad.34.2014.09.24.19.54.27 for ; Wed, 24 Sep 2014 19:54:27 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753407AbaIYCx3 (ORCPT + 27 others); Wed, 24 Sep 2014 22:53:29 -0400 Received: from szxga03-in.huawei.com ([119.145.14.66]:62180 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752632AbaIYCu6 (ORCPT ); Wed, 24 Sep 2014 22:50:58 -0400 Received: from 172.24.2.119 (EHLO szxeml409-hub.china.huawei.com) ([172.24.2.119]) by szxrg03-dlp.huawei.com (MOS 4.4.3-GA FastPath queued) with ESMTP id AUU79142; Thu, 25 Sep 2014 10:50:52 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml409-hub.china.huawei.com (10.82.67.136) with Microsoft SMTP Server id 14.3.158.1; Thu, 25 Sep 2014 10:50:41 +0800 From: Yijing Wang To: Bjorn Helgaas CC: , , Xinwei Hu , Wuyun , , Russell King , , , , , Arnd Bergmann , Thomas Gleixner , "Konrad Rzeszutek Wilk" , , Joerg Roedel , , , Benjamin Herrenschmidt , , , Sebastian Ott , "Tony Luck" , , "David S. Miller" , , Chris Metcalf , Ralf Baechle , Lucas Stach , David Vrabel , "Sergei Shtylyov" , Michael Ellerman , Thierry Reding , "Thomas Petazzoni" , Yijing Wang Subject: [PATCH v2 15/22] MIPS/Xlr/MSI: Use MSI chip framework to configure MSI/MSI-X irq Date: Thu, 25 Sep 2014 11:14:25 +0800 Message-ID: <1411614872-4009-16-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> References: <1411614872-4009-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020204.5423830D.0027, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 26f308b057489af3cc65785353f7b44c Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: wangyijing@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.173 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Use MSI chip framework instead of arch MSI functions to configure MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework. Signed-off-by: Yijing Wang --- arch/mips/pci/pci-xlr.c | 15 +++++++++++++-- 1 files changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/mips/pci/pci-xlr.c b/arch/mips/pci/pci-xlr.c index 0dde803..7bd91cc 100644 --- a/arch/mips/pci/pci-xlr.c +++ b/arch/mips/pci/pci-xlr.c @@ -214,11 +214,11 @@ static int get_irq_vector(const struct pci_dev *dev) } #ifdef CONFIG_PCI_MSI -void arch_teardown_msi_irq(unsigned int irq) +void xlr_teardown_msi_irq(unsigned int irq) { } -int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) +int xlr_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) { struct msi_msg msg; struct pci_dev *lnk; @@ -263,6 +263,17 @@ int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) write_msi_msg(irq, &msg); return 0; } + +static struct msi_chip xlr_msi_chip = { + .setup_irq = xlr_setup_msi_irq, + .teardown_irq = xlr_teardown_msi_irq, +}; + +struct msi_chip *arch_find_msi_chip(struct pci_dev *dev) +{ + return &xlr_msi_chip; +} + #endif /* Extra ACK needed for XLR on chip PCI controller */