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[209.132.180.67]) by mx.google.com with ESMTP id tw5si22679728pac.92.2014.09.23.12.59.50 for ; Tue, 23 Sep 2014 12:59:50 -0700 (PDT) Received-SPF: none (google.com: devicetree-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753714AbaIWT7t (ORCPT + 5 others); Tue, 23 Sep 2014 15:59:49 -0400 Received: from fw-tnat.cambridge.arm.com ([217.140.96.21]:54215 "EHLO cam-smtp0.cambridge.arm.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753540AbaIWT7s (ORCPT ); Tue, 23 Sep 2014 15:59:48 -0400 Received: from e106497-lin.cambridge.arm.com (e106497-lin.cambridge.arm.com [10.1.195.53]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id s8NJ1Eh0027659; Tue, 23 Sep 2014 20:01:22 +0100 From: Liviu Dudau To: Bjorn Helgaas , Arnd Bergmann , Rob Herring , Jason Gunthorpe , Benjamin Herrenschmidt , Catalin Marinas , Will Deacon , Russell King , linux-pci , Linus Walleij Cc: Tanmay Inamdar , Grant Likely , Sinan Kaya , Jingoo Han , Kukjin Kim , Suravee Suthikulanit , linux-arch , LKML , Device Tree ML , LAKML Subject: [PATCH v12 03/12] ARM: Define PCI_IOBASE as the base of virtual PCI IO space. Date: Tue, 23 Sep 2014 20:01:05 +0100 Message-Id: <1411498874-9864-4-git-send-email-Liviu.Dudau@arm.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1411498874-9864-1-git-send-email-Liviu.Dudau@arm.com> References: <1411498874-9864-1-git-send-email-Liviu.Dudau@arm.com> Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: liviu.dudau@arm.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.42 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This is needed for calls into OF code that parses PCI ranges. It signals support for memory mapped PCI I/O accesses that are described be device trees. Cc: Russell King Cc: Rob Herring Reviewed-by: Catalin Marinas Acked-by: Arnd Bergmann Signed-off-by: Liviu Dudau --- arch/arm/include/asm/io.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 3d23418..22b7529 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -178,6 +178,7 @@ static inline void __iomem *__typesafe_io(unsigned long addr) /* PCI fixed i/o mapping */ #define PCI_IO_VIRT_BASE 0xfee00000 +#define PCI_IOBASE PCI_IO_VIRT_BASE #if defined(CONFIG_PCI) void pci_ioremap_set_mem_type(int mem_type);