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[209.132.180.67]) by mx.google.com with ESMTP id il1si8010207pbb.182.2014.09.12.07.07.05 for ; Fri, 12 Sep 2014 07:07:06 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755552AbaILOHB (ORCPT + 27 others); Fri, 12 Sep 2014 10:07:01 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:52632 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755238AbaILOGT (ORCPT ); Fri, 12 Sep 2014 10:06:19 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id s8CE6I38001325; Fri, 12 Sep 2014 09:06:18 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s8CE6IlG024022; Fri, 12 Sep 2014 09:06:18 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.174.1; Fri, 12 Sep 2014 09:06:17 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s8CE6EJY027477; Fri, 12 Sep 2014 09:06:17 -0500 From: Kishon Vijay Abraham I To: CC: , Subject: [PATCH 1/3] phy: miphy365x: Fix off-by-one error Date: Fri, 12 Sep 2014 19:36:12 +0530 Message-ID: <1410530774-6715-2-git-send-email-kishon@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1410530774-6715-1-git-send-email-kishon@ti.com> References: <1410530774-6715-1-git-send-email-kishon@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: kishon@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.48 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Lee Jones We index the RX/TX speed select values in the following way: rx_tx_spd[miphy_phy->sata_gen]; However rx_tx_spd[] starts at index zero and the SATA_GENx's start at one. In this patch we pad out the first element in rx_tx_spd[] in an attempt to realign the values. Cc: Alexandre Torgue Reported-by: Gabriel Fernandez Signed-off-by: Lee Jones Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/phy-miphy365x.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/phy/phy-miphy365x.c b/drivers/phy/phy-miphy365x.c index e111baf..e0fb7a1 100644 --- a/drivers/phy/phy-miphy365x.c +++ b/drivers/phy/phy-miphy365x.c @@ -163,6 +163,7 @@ enum miphy_sata_gen { }; static u8 rx_tx_spd[] = { + 0, /* GEN0 doesn't exist. */ TX_SPDSEL_GEN1_VAL | RX_SPDSEL_GEN1_VAL, TX_SPDSEL_GEN2_VAL | RX_SPDSEL_GEN2_VAL, TX_SPDSEL_GEN3_VAL | RX_SPDSEL_GEN3_VAL