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[82.33.25.158]) by mx.google.com with ESMTPSA id di7sm38135166wjb.34.2014.07.21.07.48.50 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Jul 2014 07:48:54 -0700 (PDT) From: Daniel Thompson To: Russell King , Thomas Gleixner , Jason Cooper Cc: Marek Vasut , Harro Haan , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, patches@linaro.org, linaro-kernel@lists.linaro.org, John Stultz , Daniel Thompson Subject: [PATCH RFC 8/9] ARM: socfpga: Map the GIC CPU registers as MT_DEVICE_NS Date: Mon, 21 Jul 2014 15:47:19 +0100 Message-Id: <1405954040-30399-9-git-send-email-daniel.thompson@linaro.org> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1405954040-30399-1-git-send-email-daniel.thompson@linaro.org> References: <1405954040-30399-1-git-send-email-daniel.thompson@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: daniel.thompson@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.173 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Marek Vasut Statically map the SoCFPGA's memory space at PA 0xfff00000 +1MiB to 0xff000000 and set type of this VA to be MT_DEVICE_NS. This PA contains the SoCFPGA's GIC CPU registers at offset +0xec100. This area is right past VMALLOC_END and well below the optional start of per-CPU highmem entries. We can thus use this area to place our mapping here and be sure it's not in anyone's way. All accesses to VA 0xff000000 generate non-secure accesses on the bus and we can leverage this property to generate non-secure read of the GIC INTACK (IAR) register. This non-secure read will never return an FIQ interrupt number. Signed-off-by: Marek Vasut Signed-off-by: Daniel Thompson --- arch/arm/mach-socfpga/socfpga.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c index adbf383..5b60f82 100644 --- a/arch/arm/mach-socfpga/socfpga.c +++ b/arch/arm/mach-socfpga/socfpga.c @@ -45,6 +45,13 @@ static struct map_desc uart_io_desc __initdata = { .type = MT_DEVICE, }; +static struct map_desc gic_cpu_io_desc __initdata = { + .virtual = 0xff000000, + .pfn = __phys_to_pfn(0xfff00000), + .length = SZ_1M, + .type = MT_DEVICE_NS, +}; + static void __init socfpga_scu_map_io(void) { unsigned long base; @@ -60,6 +67,7 @@ static void __init socfpga_map_io(void) { socfpga_scu_map_io(); iotable_init(&uart_io_desc, 1); + iotable_init(&gic_cpu_io_desc, 1); early_printk("Early printk initialized\n"); }