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[82.33.25.158]) by mx.google.com with ESMTPSA id hi4sm1163784wjc.27.2014.06.24.08.18.31 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 24 Jun 2014 08:18:32 -0700 (PDT) From: Daniel Thompson To: Russell King Cc: Daniel Thompson , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kgdb-bugreport@lists.sourceforge.net, patches@linaro.org, linaro-kernel@lists.linaro.org, John Stultz , Anton Vorontsov , Colin Cross , kernel-team@android.com, Rob Herring , Linus Walleij , Ben Dooks , Catalin Marinas , Dave Martin , Fabio Estevam , Frederic Weisbecker , Nicolas Pitre Subject: [PATCH v6 2/4] arm: fiq: Allow EOI to be communicated to the intc Date: Tue, 24 Jun 2014 16:18:15 +0100 Message-Id: <1403623097-1153-3-git-send-email-daniel.thompson@linaro.org> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1403623097-1153-1-git-send-email-daniel.thompson@linaro.org> References: <1403174303-25456-1-git-send-email-daniel.thompson@linaro.org> <1403623097-1153-1-git-send-email-daniel.thompson@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: daniel.thompson@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.170 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Modern ARM systems require an EOI to be sent to the interrupt controller on completion of both IRQ and FIQ. The FIQ code currently does not provide any API to perform this. This patch provides this API, implemented by adding a callback to the fiq_chip structure. Signed-off-by: Daniel Thompson Cc: Russell King Cc: Fabio Estevam Cc: Nicolas Pitre Acked-by: Nicolas Pitre --- arch/arm/include/asm/fiq.h | 6 ++++++ arch/arm/kernel/fiq.c | 9 +++++++++ 2 files changed, 15 insertions(+) diff --git a/arch/arm/include/asm/fiq.h b/arch/arm/include/asm/fiq.h index a7806ef..e5d9458 100644 --- a/arch/arm/include/asm/fiq.h +++ b/arch/arm/include/asm/fiq.h @@ -21,6 +21,11 @@ struct fiq_chip { void (*fiq_enable)(struct irq_data *data); void (*fiq_disable)(struct irq_data *data); + + /* .fiq_eoi() will be called from the FIQ handler. For this + * reason it must not use spin locks (or any other locks). + */ + void (*fiq_eoi)(struct irq_data *data); }; struct fiq_handler { @@ -43,6 +48,7 @@ extern void release_fiq(struct fiq_handler *f); extern void set_fiq_handler(void *start, unsigned int length); extern void enable_fiq(int fiq); extern void disable_fiq(int fiq); +extern void eoi_fiq(int fiq); extern bool has_fiq(int fiq); extern void fiq_register_mapping(int irq, struct fiq_chip *chip); diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c index 567f8fd..edde332 100644 --- a/arch/arm/kernel/fiq.c +++ b/arch/arm/kernel/fiq.c @@ -183,6 +183,15 @@ void disable_fiq(int fiq) disable_irq(fiq + fiq_start); } +void eoi_fiq(int fiq) +{ + struct fiq_data *data = lookup_fiq_data(fiq); + + if (data && data->fiq_chip->fiq_eoi) + data->fiq_chip->fiq_eoi(data->irq_data); +} +EXPORT_SYMBOL(eoi_fiq); + bool has_fiq(int fiq) { struct fiq_data *data = lookup_fiq_data(fiq);