From patchwork Tue Jun 3 21:29:50 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Larry Bassel X-Patchwork-Id: 31341 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ve0-f199.google.com (mail-ve0-f199.google.com [209.85.128.199]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 1829120AE6 for ; Tue, 3 Jun 2014 21:31:00 +0000 (UTC) Received: by mail-ve0-f199.google.com with SMTP id oz11sf32591613veb.10 for ; Tue, 03 Jun 2014 14:30:59 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=rHmuvnd8lee5iyq6WH3OzoX/UIQ0kZLr2t2FRQ5rczo=; b=b5ZYKISIn1i8fFLFSPQpF2ur/jAuQa7rqq8/fgtXBAWtK034GJ6Ba0o/VpHiM9bs58 LufXf0/ZdGbVnDs5blwwlyasB0FQaoCQpRmt1mHZ7JB+nxa7h456/6sMpEe1+/8XbUvc Iv+1Qmg8ix4oZZOdp5T0Ko1evgAFsQyjRDJCuu1C75T8P65TxSF7cabTj+tvw68Ht+X6 1Wg7S3B9DhG7G1+36NBlteR7UZvoQhLETqTND6GOOGQe74VruILFUywt8VfX8Gub4Dsx WnQR8amOch5Zimesil63ic3plFxQPqMT4UbTVyP3zROWzu5/0nwzOHsk+DR55hItgr4b jM1A== X-Gm-Message-State: ALoCoQlcqhrk3CIGF6H5oyJgAORV2aHzym1sQoH9yAN/lhXWRm4PvznvPH1AdPWw9a1i++tO1cA+ X-Received: by 10.58.219.37 with SMTP id pl5mr19314185vec.8.1401831059853; Tue, 03 Jun 2014 14:30:59 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.91.201 with SMTP id z67ls2812878qgd.94.gmail; Tue, 03 Jun 2014 14:30:59 -0700 (PDT) X-Received: by 10.58.135.136 with SMTP id ps8mr39209925veb.18.1401831059747; Tue, 03 Jun 2014 14:30:59 -0700 (PDT) Received: from mail-ve0-f176.google.com (mail-ve0-f176.google.com [209.85.128.176]) by mx.google.com with ESMTPS id fe3si290341vec.43.2014.06.03.14.30.59 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 03 Jun 2014 14:30:59 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.176 as permitted sender) client-ip=209.85.128.176; Received: by mail-ve0-f176.google.com with SMTP id jz11so7621424veb.7 for ; Tue, 03 Jun 2014 14:30:59 -0700 (PDT) X-Received: by 10.52.4.40 with SMTP id h8mr3139117vdh.95.1401831059664; Tue, 03 Jun 2014 14:30:59 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.221.72 with SMTP id ib8csp26469vcb; Tue, 3 Jun 2014 14:30:59 -0700 (PDT) X-Received: by 10.68.189.68 with SMTP id gg4mr55058854pbc.42.1401831057889; Tue, 03 Jun 2014 14:30:57 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id tz6si876782pbc.165.2014.06.03.14.30.57; Tue, 03 Jun 2014 14:30:57 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934249AbaFCVat (ORCPT + 27 others); Tue, 3 Jun 2014 17:30:49 -0400 Received: from mail-ob0-f170.google.com ([209.85.214.170]:54149 "EHLO mail-ob0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965135AbaFCVaG (ORCPT ); Tue, 3 Jun 2014 17:30:06 -0400 Received: by mail-ob0-f170.google.com with SMTP id uy5so6792118obc.29 for ; Tue, 03 Jun 2014 14:30:06 -0700 (PDT) X-Received: by 10.60.156.38 with SMTP id wb6mr51948647oeb.41.1401831005926; Tue, 03 Jun 2014 14:30:05 -0700 (PDT) Received: from localhost.localdomain (adsl-71-136-229-5.dsl.sndg02.pacbell.net. [71.136.229.5]) by mx.google.com with ESMTPSA id tk2sm1536615oeb.2.2014.06.03.14.30.04 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 03 Jun 2014 14:30:05 -0700 (PDT) From: Larry Bassel To: catalin.marinas@arm.com, will.deacon@arm.com Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linaro-kernel@lists.linaro.org, khilman@linaro.org, Larry Bassel Subject: [PATCH v8 1/2] arm64: adjust el0_sync so that a function can be called Date: Tue, 3 Jun 2014 14:29:50 -0700 Message-Id: <1401830991-21233-2-git-send-email-larry.bassel@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1401830991-21233-1-git-send-email-larry.bassel@linaro.org> References: <1401830991-21233-1-git-send-email-larry.bassel@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: larry.bassel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.176 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , To implement the context tracker properly on arm64, a function call needs to be made after debugging and interrupts are turned on, but before the lr is changed to point to ret_to_user(). If the function call is made after the lr is changed the function will not return to the correct place. For similar reasons, defer the setting of x0 so that it doesn't need to be saved around the function call (save far_el1 in x26 temporarily instead). Acked-by: Will Deacon Reviewed-by: Kevin Hilman Tested-by: Kevin Hilman Signed-off-by: Larry Bassel --- arch/arm64/kernel/entry.S | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index e8b23a3..b0101b9 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -354,7 +354,6 @@ el0_sync: lsr x24, x25, #ESR_EL1_EC_SHIFT // exception class cmp x24, #ESR_EL1_EC_SVC64 // SVC in 64-bit state b.eq el0_svc - adr lr, ret_to_user cmp x24, #ESR_EL1_EC_DABT_EL0 // data abort in EL0 b.eq el0_da cmp x24, #ESR_EL1_EC_IABT_EL0 // instruction abort in EL0 @@ -383,7 +382,6 @@ el0_sync_compat: lsr x24, x25, #ESR_EL1_EC_SHIFT // exception class cmp x24, #ESR_EL1_EC_SVC32 // SVC in 32-bit state b.eq el0_svc_compat - adr lr, ret_to_user cmp x24, #ESR_EL1_EC_DABT_EL0 // data abort in EL0 b.eq el0_da cmp x24, #ESR_EL1_EC_IABT_EL0 // instruction abort in EL0 @@ -426,22 +424,25 @@ el0_da: /* * Data abort handling */ - mrs x0, far_el1 - bic x0, x0, #(0xff << 56) + mrs x26, far_el1 // enable interrupts before calling the main handler enable_dbg_and_irq + bic x0, x26, #(0xff << 56) mov x1, x25 mov x2, sp + adr lr, ret_to_user b do_mem_abort el0_ia: /* * Instruction abort handling */ - mrs x0, far_el1 + mrs x26, far_el1 // enable interrupts before calling the main handler enable_dbg_and_irq + mov x0, x26 orr x1, x25, #1 << 24 // use reserved ISS bit for instruction aborts mov x2, sp + adr lr, ret_to_user b do_mem_abort el0_fpsimd_acc: /* @@ -450,6 +451,7 @@ el0_fpsimd_acc: enable_dbg mov x0, x25 mov x1, sp + adr lr, ret_to_user b do_fpsimd_acc el0_fpsimd_exc: /* @@ -458,16 +460,19 @@ el0_fpsimd_exc: enable_dbg mov x0, x25 mov x1, sp + adr lr, ret_to_user b do_fpsimd_exc el0_sp_pc: /* * Stack or PC alignment exception handling */ - mrs x0, far_el1 + mrs x26, far_el1 // enable interrupts before calling the main handler enable_dbg_and_irq + mov x0, x26 mov x1, x25 mov x2, sp + adr lr, ret_to_user b do_sp_pc_abort el0_undef: /* @@ -476,6 +481,7 @@ el0_undef: // enable interrupts before calling the main handler enable_dbg_and_irq mov x0, sp + adr lr, ret_to_user b do_undefinstr el0_dbg: /* @@ -493,6 +499,7 @@ el0_inv: mov x0, sp mov x1, #BAD_SYNC mrs x2, esr_el1 + adr lr, ret_to_user b bad_mode ENDPROC(el0_sync)