From patchwork Fri May 23 10:31:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 30734 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oa0-f69.google.com (mail-oa0-f69.google.com [209.85.219.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 6BA9C2066E for ; Fri, 23 May 2014 10:41:23 +0000 (UTC) Received: by mail-oa0-f69.google.com with SMTP id i7sf22292006oag.8 for ; Fri, 23 May 2014 03:41:23 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=UB1vb8r4u7lSf2Wq3p8REwYyDHZrCb6kO7/y/JbRCEI=; b=HN1p2BxwK3N6zbL3orIOxsbmI7GJrQbtjgKkTclukAT1t5yOJzN/GpHJj0/fXWTkZj k+TvzygUnOvOQvaXJF/C7WCENkpC+Eah8wFGgVfOMGBgNCwdgFysp9Hn3pGNOjl96t8U xLE6UKXmQTUVqQQufgmmmmT8XCP1qlrtQS2t2dKtYxljupNf9aBYYCcDJ+Rj/joYgRmU Pu7KPPLJ/rRDqrfdcCfGU+FQ4eAbiVgyhaXazWq1YA54IzoE5iW5woR0faTUjWUCvnVi exd0h5k8w3apSS+JZWDrD+KsQ5sna7vJDrg/kBngt1N3axDKzhtVIBHiyvtvQYFt3i0z /b3w== X-Gm-Message-State: ALoCoQkDerRljy28MIEpaMd+q0U7UZcCirxc6B9Z5PzcXrsTHKvj4/D9CN4eoICIxBTMsRv1tetP X-Received: by 10.42.233.133 with SMTP id jy5mr1617235icb.32.1400841683036; Fri, 23 May 2014 03:41:23 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.17.19 with SMTP id 19ls291660qgc.69.gmail; Fri, 23 May 2014 03:41:22 -0700 (PDT) X-Received: by 10.52.183.228 with SMTP id ep4mr2876278vdc.30.1400841682885; Fri, 23 May 2014 03:41:22 -0700 (PDT) Received: from mail-ve0-f176.google.com (mail-ve0-f176.google.com [209.85.128.176]) by mx.google.com with ESMTPS id lt5si1377166vcb.103.2014.05.23.03.41.22 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 23 May 2014 03:41:22 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.176 as permitted sender) client-ip=209.85.128.176; Received: by mail-ve0-f176.google.com with SMTP id jz11so5967436veb.21 for ; Fri, 23 May 2014 03:41:22 -0700 (PDT) X-Received: by 10.220.195.196 with SMTP id ed4mr132841vcb.42.1400841682675; Fri, 23 May 2014 03:41:22 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.221.72 with SMTP id ib8csp20368vcb; Fri, 23 May 2014 03:41:22 -0700 (PDT) X-Received: by 10.68.211.233 with SMTP id nf9mr4648950pbc.29.1400841681851; Fri, 23 May 2014 03:41:21 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id kn8si3299596pab.196.2014.05.23.03.41.21 for ; Fri, 23 May 2014 03:41:21 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753494AbaEWKlO (ORCPT + 27 others); Fri, 23 May 2014 06:41:14 -0400 Received: from mail-wg0-f42.google.com ([74.125.82.42]:57068 "EHLO mail-wg0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752943AbaEWKch (ORCPT ); Fri, 23 May 2014 06:32:37 -0400 Received: by mail-wg0-f42.google.com with SMTP id y10so4532183wgg.1 for ; Fri, 23 May 2014 03:32:36 -0700 (PDT) X-Received: by 10.194.219.164 with SMTP id pp4mr3318224wjc.19.1400841156264; Fri, 23 May 2014 03:32:36 -0700 (PDT) Received: from localhost.localdomain (AToulouse-654-1-404-187.w82-125.abo.wanadoo.fr. [82.125.3.187]) by mx.google.com with ESMTPSA id s9sm2200908wix.13.2014.05.23.03.32.34 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 23 May 2014 03:32:35 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de, mingo@kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 49/71] clocksource: sh_mtu2: Add support for multiple channels per device Date: Fri, 23 May 2014 12:31:29 +0200 Message-Id: <1400841111-6683-49-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1400841111-6683-1-git-send-email-daniel.lezcano@linaro.org> References: <537F214C.8000700@linaro.org> <1400841111-6683-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: daniel.lezcano@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.176 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Laurent Pinchart MTU2 hardware devices can support multiple channels, with global registers and per-channel registers. The sh_mtu2 driver currently models the hardware with one Linux device per channel. This model makes it difficult to handle global registers in a clean way. Add support for a new model that uses one Linux device per timer with multiple channels per device. This requires changes to platform data, add new channel configuration fields. Support for the legacy model is kept and will be removed after all platforms switch to the new model. Signed-off-by: Laurent Pinchart Tested-by: Wolfram Sang --- drivers/clocksource/sh_mtu2.c | 184 +++++++++++++++++++++++++++++------------ 1 file changed, 130 insertions(+), 54 deletions(-) diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c index 14cc7b6..7cc6d942 100644 --- a/drivers/clocksource/sh_mtu2.c +++ b/drivers/clocksource/sh_mtu2.c @@ -54,6 +54,9 @@ struct sh_mtu2_device { struct sh_mtu2_channel *channels; unsigned int num_channels; + + bool legacy; + bool has_clockevent; }; static DEFINE_RAW_SPINLOCK(sh_mtu2_lock); @@ -163,8 +166,12 @@ static inline unsigned long sh_mtu2_read(struct sh_mtu2_channel *ch, int reg_nr) { unsigned long offs; - if (reg_nr == TSTR) - return ioread8(ch->mtu->mapbase); + if (reg_nr == TSTR) { + if (ch->mtu->legacy) + return ioread8(ch->mtu->mapbase); + else + return ioread8(ch->mtu->mapbase + 0x280); + } offs = mtu2_reg_offs[reg_nr]; @@ -180,8 +187,10 @@ static inline void sh_mtu2_write(struct sh_mtu2_channel *ch, int reg_nr, unsigned long offs; if (reg_nr == TSTR) { - iowrite8(value, ch->mtu->mapbase); - return; + if (ch->mtu->legacy) + return iowrite8(value, ch->mtu->mapbase); + else + return iowrite8(value, ch->mtu->mapbase + 0x280); } offs = mtu2_reg_offs[reg_nr]; @@ -353,109 +362,168 @@ static void sh_mtu2_register_clockevent(struct sh_mtu2_channel *ch, static int sh_mtu2_register(struct sh_mtu2_channel *ch, const char *name, bool clockevent) { - if (clockevent) + if (clockevent) { + ch->mtu->has_clockevent = true; sh_mtu2_register_clockevent(ch, name); + } return 0; } -static int sh_mtu2_setup_channel(struct sh_mtu2_channel *ch, +static int sh_mtu2_setup_channel(struct sh_mtu2_channel *ch, unsigned int index, struct sh_mtu2_device *mtu) { - struct sh_timer_config *cfg = mtu->pdev->dev.platform_data; + static const unsigned int channel_offsets[] = { + 0x300, 0x380, 0x000, + }; + bool clockevent; ch->mtu = mtu; - ch->index = cfg->timer_bit; - ch->irq = platform_get_irq(mtu->pdev, 0); + if (mtu->legacy) { + struct sh_timer_config *cfg = mtu->pdev->dev.platform_data; + + clockevent = cfg->clockevent_rating != 0; + + ch->irq = platform_get_irq(mtu->pdev, 0); + ch->base = mtu->mapbase - cfg->channel_offset; + ch->index = cfg->timer_bit; + } else { + char name[6]; + + clockevent = true; + + sprintf(name, "tgi%ua", index); + ch->irq = platform_get_irq_byname(mtu->pdev, name); + ch->base = mtu->mapbase + channel_offsets[index]; + ch->index = index; + } + if (ch->irq < 0) { + /* Skip channels with no declared interrupt. */ + if (!mtu->legacy) + return 0; + dev_err(&mtu->pdev->dev, "ch%u: failed to get irq\n", ch->index); return ch->irq; } - return sh_mtu2_register(ch, dev_name(&mtu->pdev->dev), - cfg->clockevent_rating != 0); + return sh_mtu2_register(ch, dev_name(&mtu->pdev->dev), clockevent); } -static int sh_mtu2_setup(struct sh_mtu2_device *mtu, - struct platform_device *pdev) +static int sh_mtu2_map_memory(struct sh_mtu2_device *mtu) { - struct sh_timer_config *cfg = pdev->dev.platform_data; struct resource *res; - void __iomem *base; - int ret; - ret = -ENXIO; - - mtu->pdev = pdev; - - if (!cfg) { - dev_err(&mtu->pdev->dev, "missing platform data\n"); - goto err0; - } - - platform_set_drvdata(pdev, mtu); res = platform_get_resource(mtu->pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(&mtu->pdev->dev, "failed to get I/O memory\n"); - goto err0; + return -ENXIO; } + mtu->mapbase = ioremap_nocache(res->start, resource_size(res)); + if (mtu->mapbase == NULL) + return -ENXIO; + /* - * Map memory, let base point to our channel and mapbase to the - * start/stop shared register. + * In legacy platform device configuration (with one device per channel) + * the resource points to the channel base address. */ - base = ioremap_nocache(res->start, resource_size(res)); - if (base == NULL) { - dev_err(&mtu->pdev->dev, "failed to remap I/O memory\n"); - goto err0; + if (mtu->legacy) { + struct sh_timer_config *cfg = mtu->pdev->dev.platform_data; + mtu->mapbase += cfg->channel_offset; + } + + return 0; +} + +static void sh_mtu2_unmap_memory(struct sh_mtu2_device *mtu) +{ + if (mtu->legacy) { + struct sh_timer_config *cfg = mtu->pdev->dev.platform_data; + mtu->mapbase -= cfg->channel_offset; } - mtu->mapbase = base + cfg->channel_offset; + iounmap(mtu->mapbase); +} + +static int sh_mtu2_setup(struct sh_mtu2_device *mtu, + struct platform_device *pdev) +{ + struct sh_timer_config *cfg = pdev->dev.platform_data; + const struct platform_device_id *id = pdev->id_entry; + unsigned int i; + int ret; + + mtu->pdev = pdev; + mtu->legacy = id->driver_data; + + if (mtu->legacy && !cfg) { + dev_err(&mtu->pdev->dev, "missing platform data\n"); + return -ENXIO; + } - /* get hold of clock */ + /* Get hold of clock. */ mtu->clk = clk_get(&mtu->pdev->dev, "mtu2_fck"); if (IS_ERR(mtu->clk)) { dev_err(&mtu->pdev->dev, "cannot get clock\n"); - ret = PTR_ERR(mtu->clk); - goto err1; + return PTR_ERR(mtu->clk); } ret = clk_prepare(mtu->clk); if (ret < 0) - goto err2; + goto err_clk_put; - mtu->channels = kzalloc(sizeof(*mtu->channels), GFP_KERNEL); + /* Map the memory resource. */ + ret = sh_mtu2_map_memory(mtu); + if (ret < 0) { + dev_err(&mtu->pdev->dev, "failed to remap I/O memory\n"); + goto err_clk_unprepare; + } + + /* Allocate and setup the channels. */ + if (mtu->legacy) + mtu->num_channels = 1; + else + mtu->num_channels = 3; + + mtu->channels = kzalloc(sizeof(*mtu->channels) * mtu->num_channels, + GFP_KERNEL); if (mtu->channels == NULL) { ret = -ENOMEM; - goto err3; + goto err_unmap; } - mtu->num_channels = 1; - - mtu->channels[0].base = base; + if (mtu->legacy) { + ret = sh_mtu2_setup_channel(&mtu->channels[0], 0, mtu); + if (ret < 0) + goto err_unmap; + } else { + for (i = 0; i < mtu->num_channels; ++i) { + ret = sh_mtu2_setup_channel(&mtu->channels[i], i, mtu); + if (ret < 0) + goto err_unmap; + } + } - ret = sh_mtu2_setup_channel(&mtu->channels[0], mtu); - if (ret < 0) - goto err3; + platform_set_drvdata(pdev, mtu); return 0; - err3: + +err_unmap: kfree(mtu->channels); + sh_mtu2_unmap_memory(mtu); +err_clk_unprepare: clk_unprepare(mtu->clk); - err2: +err_clk_put: clk_put(mtu->clk); - err1: - iounmap(base); - err0: return ret; } static int sh_mtu2_probe(struct platform_device *pdev) { struct sh_mtu2_device *mtu = platform_get_drvdata(pdev); - struct sh_timer_config *cfg = pdev->dev.platform_data; int ret; if (!is_early_platform_device(pdev)) { @@ -484,7 +552,7 @@ static int sh_mtu2_probe(struct platform_device *pdev) return 0; out: - if (cfg->clockevent_rating) + if (mtu->has_clockevent) pm_runtime_irq_safe(&pdev->dev); else pm_runtime_idle(&pdev->dev); @@ -497,12 +565,20 @@ static int sh_mtu2_remove(struct platform_device *pdev) return -EBUSY; /* cannot unregister clockevent */ } +static const struct platform_device_id sh_mtu2_id_table[] = { + { "sh_mtu2", 1 }, + { "sh-mtu2", 0 }, + { }, +}; +MODULE_DEVICE_TABLE(platform, sh_mtu2_id_table); + static struct platform_driver sh_mtu2_device_driver = { .probe = sh_mtu2_probe, .remove = sh_mtu2_remove, .driver = { .name = "sh_mtu2", - } + }, + .id_table = sh_mtu2_id_table, }; static int __init sh_mtu2_init(void)