From patchwork Fri May 23 10:31:06 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 30748 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-vc0-f200.google.com (mail-vc0-f200.google.com [209.85.220.200]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 24B022066E for ; Fri, 23 May 2014 10:44:29 +0000 (UTC) Received: by mail-vc0-f200.google.com with SMTP id lc6sf15979933vcb.3 for ; Fri, 23 May 2014 03:44:28 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:subject:date:message-id :in-reply-to:references:cc:precedence:list-id:list-unsubscribe :list-archive:list-post:list-help:list-subscribe:mime-version:sender :errors-to:x-original-sender:x-original-authentication-results :mailing-list:content-type:content-transfer-encoding; bh=EoUmhliNIt8aBLu3PKj7HjmIdXUfiekotJKOh/c1xcU=; b=Q68BMagpzpcVMvQR+BMuONddMBcyZWmRQyxcgRHfNDpp+0HUUNi/A2/rO2D6+UirzZ Pm2VrczsUsMAtTirfj5y4RKxDYLzn9HkcpDqjLPwm2xUjoCNhsL81HW9zFZTVv4yYy6d 3nXwl6LKG1zi72UsJzMwUduDb9Z9z1249IGhwJE6vSw7+vYn40Pd0PaoNMnSOKAHxMGe bWwJ1QgPDoMAQ4NygtVdnbkQ1udvoGkJJgpdEhyzZme20OYySWJ2uhMUJGPeKj7BSMIY bY2wAP+xyEk7JwJvAY8VdroH8LFS2+whXPtjEbaeXvMQz5QffNdSehSxPXHPyWXmIKZS RREw== X-Gm-Message-State: ALoCoQnZSHNT0f+1NHNXiv6S+ri98jFOFV2CAVT1rpHE8gUHX1dMXcPCYqnj3aup779Ksr3zf08K X-Received: by 10.236.128.195 with SMTP id f43mr1477784yhi.45.1400841868604; Fri, 23 May 2014 03:44:28 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.80.139 with SMTP id c11ls1031297qgd.66.gmail; Fri, 23 May 2014 03:44:28 -0700 (PDT) X-Received: by 10.58.29.16 with SMTP id f16mr3480982veh.23.1400841868475; Fri, 23 May 2014 03:44:28 -0700 (PDT) Received: from mail-ve0-f176.google.com (mail-ve0-f176.google.com [209.85.128.176]) by mx.google.com with ESMTPS id zd11si1385153vdc.67.2014.05.23.03.44.28 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 23 May 2014 03:44:28 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.176 as permitted sender) client-ip=209.85.128.176; Received: by mail-ve0-f176.google.com with SMTP id jz11so5970749veb.21 for ; Fri, 23 May 2014 03:44:28 -0700 (PDT) X-Received: by 10.52.185.72 with SMTP id fa8mr2932021vdc.12.1400841868390; Fri, 23 May 2014 03:44:28 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.221.72 with SMTP id ib8csp20515vcb; Fri, 23 May 2014 03:44:28 -0700 (PDT) X-Received: by 10.224.98.141 with SMTP id q13mr5198332qan.64.1400841867946; Fri, 23 May 2014 03:44:27 -0700 (PDT) Received: from bombadil.infradead.org (bombadil.infradead.org. [2001:1868:205::9]) by mx.google.com with ESMTPS id l65si2959205qge.91.2014.05.23.03.44.27 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 May 2014 03:44:27 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wnmvc-0002fi-0H; Fri, 23 May 2014 10:42:20 +0000 Received: from mail-wg0-f41.google.com ([74.125.82.41]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wnmm6-0001PU-0N for linux-arm-kernel@lists.infradead.org; Fri, 23 May 2014 10:32:30 +0000 Received: by mail-wg0-f41.google.com with SMTP id z12so4635277wgg.12 for ; Fri, 23 May 2014 03:32:08 -0700 (PDT) X-Received: by 10.180.212.77 with SMTP id ni13mr2394069wic.5.1400841128110; Fri, 23 May 2014 03:32:08 -0700 (PDT) Received: from localhost.localdomain (AToulouse-654-1-404-187.w82-125.abo.wanadoo.fr. [82.125.3.187]) by mx.google.com with ESMTPSA id s9sm2200908wix.13.2014.05.23.03.32.06 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 23 May 2014 03:32:07 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de, mingo@kernel.org Subject: [PATCH 26/71] clocksource: sh_tmu: Add memory base to sh_tmu_channel structure Date: Fri, 23 May 2014 12:31:06 +0200 Message-Id: <1400841111-6683-26-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1400841111-6683-1-git-send-email-daniel.lezcano@linaro.org> References: <537F214C.8000700@linaro.org> <1400841111-6683-1-git-send-email-daniel.lezcano@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140523_033230_270168_0561B71D X-CRM114-Status: GOOD ( 15.17 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.3.2 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.82.41 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: daniel.lezcano@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.176 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Laurent Pinchart The channel memory base is channel-specific, add it to the channel structure in preparation for support of multiple channels per device. Signed-off-by: Laurent Pinchart --- drivers/clocksource/sh_tmu.c | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c index 2c64e3f..a464ed8 100644 --- a/drivers/clocksource/sh_tmu.c +++ b/drivers/clocksource/sh_tmu.c @@ -40,6 +40,7 @@ struct sh_tmu_device; struct sh_tmu_channel { struct sh_tmu_device *tmu; + void __iomem *base; int irq; unsigned long rate; @@ -68,39 +69,35 @@ static DEFINE_RAW_SPINLOCK(sh_tmu_lock); static inline unsigned long sh_tmu_read(struct sh_tmu_channel *ch, int reg_nr) { - struct sh_timer_config *cfg = ch->tmu->pdev->dev.platform_data; - void __iomem *base = ch->tmu->mapbase; unsigned long offs; if (reg_nr == TSTR) - return ioread8(base - cfg->channel_offset); + return ioread8(ch->tmu->mapbase); offs = reg_nr << 2; if (reg_nr == TCR) - return ioread16(base + offs); + return ioread16(ch->base + offs); else - return ioread32(base + offs); + return ioread32(ch->base + offs); } static inline void sh_tmu_write(struct sh_tmu_channel *ch, int reg_nr, unsigned long value) { - struct sh_timer_config *cfg = ch->tmu->pdev->dev.platform_data; - void __iomem *base = ch->tmu->mapbase; unsigned long offs; if (reg_nr == TSTR) { - iowrite8(value, base - cfg->channel_offset); + iowrite8(value, ch->tmu->mapbase); return; } offs = reg_nr << 2; if (reg_nr == TCR) - iowrite16(value, base + offs); + iowrite16(value, ch->base + offs); else - iowrite32(value, base + offs); + iowrite32(value, ch->base + offs); } static void sh_tmu_start_stop_ch(struct sh_tmu_channel *ch, int start) @@ -481,13 +478,18 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev) goto err0; } - /* map memory, let mapbase point to our channel */ - tmu->mapbase = ioremap_nocache(res->start, resource_size(res)); - if (tmu->mapbase == NULL) { + /* + * Map memory, let channel.base point to our channel and mapbase to the + * start/stop shared register. + */ + tmu->channel.base = ioremap_nocache(res->start, resource_size(res)); + if (tmu->channel.base == NULL) { dev_err(&tmu->pdev->dev, "failed to remap I/O memory\n"); goto err0; } + tmu->mapbase = tmu->channel.base - cfg->channel_offset; + /* get hold of clock */ tmu->clk = clk_get(&tmu->pdev->dev, "tmu_fck"); if (IS_ERR(tmu->clk)) { @@ -511,7 +513,7 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev) err2: clk_put(tmu->clk); err1: - iounmap(tmu->mapbase); + iounmap(tmu->channel.base); err0: return ret; }