From patchwork Thu May 22 16:47:25 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 30643 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-yh0-f72.google.com (mail-yh0-f72.google.com [209.85.213.72]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 0881220671 for ; Thu, 22 May 2014 16:51:57 +0000 (UTC) Received: by mail-yh0-f72.google.com with SMTP id f73sf13927614yha.11 for ; Thu, 22 May 2014 09:51:56 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=gfPzqgDDY+TvZDAgY0A3hero4xe/ZTHHxuVph9fU4as=; b=APJYtLHJ3wn3jK2Z19t9ERU77cI6rpBiUIvqFfpS7ehMc3eHRTiDSlI3sAAIEQTs2x nz8vkZ7PWRYFP0/MQ8RMN92QGO5kuAos22fRGHFYpOknBZm4hsbcTJ9X7XWRFp1Ai5dY 7nm/0R5mx5WntiStM4JBh41u8lPVyfUHiblZamh+P0rrolpghv1ZgoTEwXDM0p9v4NzZ 1oziDx+ToZUDA4M5ArLym+5UYtHqsIs0TwtCvJfbvTRSJoX2STopJFjMFamY8rtgKfy7 w4jxZ7upx5Er7AEP1LI7RV1Ax8j1ENI81GOrU9bPlzzdI3w4R6GOaWmcwzD6SwMwSH+c xdyQ== X-Gm-Message-State: ALoCoQnrl4vufY8/Xw6jZVGJpmiPFeimQ8tZ1rryrfLRFWAOq9m8iUlHzId+CaTidZCXke23UwVm X-Received: by 10.236.189.235 with SMTP id c71mr22549389yhn.11.1400777516848; Thu, 22 May 2014 09:51:56 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.50.143 with SMTP id s15ls1327522qga.33.gmail; Thu, 22 May 2014 09:51:56 -0700 (PDT) X-Received: by 10.52.2.229 with SMTP id 5mr14231001vdx.24.1400777516687; Thu, 22 May 2014 09:51:56 -0700 (PDT) Received: from mail-ve0-f178.google.com (mail-ve0-f178.google.com [209.85.128.178]) by mx.google.com with ESMTPS id fx3si198715vdc.84.2014.05.22.09.51.56 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 22 May 2014 09:51:56 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.178 as permitted sender) client-ip=209.85.128.178; Received: by mail-ve0-f178.google.com with SMTP id sa20so4830961veb.9 for ; Thu, 22 May 2014 09:51:56 -0700 (PDT) X-Received: by 10.52.139.101 with SMTP id qx5mr14329264vdb.17.1400777516563; Thu, 22 May 2014 09:51:56 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.221.72 with SMTP id ib8csp215310vcb; Thu, 22 May 2014 09:51:56 -0700 (PDT) X-Received: by 10.67.3.229 with SMTP id bz5mr28062322pad.80.1400777515792; Thu, 22 May 2014 09:51:55 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id fu6si447280pac.106.2014.05.22.09.51.55 for ; Thu, 22 May 2014 09:51:55 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752978AbaEVQsY (ORCPT + 27 others); Thu, 22 May 2014 12:48:24 -0400 Received: from cam-admin0.cambridge.arm.com ([217.140.96.50]:48892 "EHLO cam-admin0.cambridge.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752913AbaEVQsX (ORCPT ); Thu, 22 May 2014 12:48:23 -0400 Received: from edgewater-inn.cambridge.arm.com (edgewater-inn.cambridge.arm.com [10.1.203.25]) by cam-admin0.cambridge.arm.com (8.12.6/8.12.6) with ESMTP id s4MGlawo028199; Thu, 22 May 2014 17:47:36 +0100 (BST) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 0001C1AE341C; Thu, 22 May 2014 17:47:34 +0100 (BST) From: Will Deacon To: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org Cc: arnd@arndb.de, monstr@monstr.eu, dhowells@redhat.com, broonie@linaro.org, benh@kernel.crashing.org, peterz@infradead.org, paulmck@linux.vnet.ibm.com, Will Deacon Subject: [PATCH v2 13/18] powerpc: io: implement dummy relaxed accessor macros for writes Date: Thu, 22 May 2014 17:47:25 +0100 Message-Id: <1400777250-17335-14-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 1.9.2 In-Reply-To: <1400777250-17335-1-git-send-email-will.deacon@arm.com> References: <1400777250-17335-1-git-send-email-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: will.deacon@arm.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.178 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , write{b,w,l,q}_relaxed are implemented by some architectures in order to permit memory-mapped I/O accesses with weaker barrier semantics than the non-relaxed variants. This patch adds dummy macros for the write accessors to powerpc, in the same vein as the dummy definitions for the relaxed read accessors. Cc: Benjamin Herrenschmidt Signed-off-by: Will Deacon --- arch/powerpc/include/asm/io.h | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h index 97d3869991ca..9eaf301ac952 100644 --- a/arch/powerpc/include/asm/io.h +++ b/arch/powerpc/include/asm/io.h @@ -617,10 +617,14 @@ static inline void name at \ /* * We don't do relaxed operations yet, at least not with this semantic */ -#define readb_relaxed(addr) readb(addr) -#define readw_relaxed(addr) readw(addr) -#define readl_relaxed(addr) readl(addr) -#define readq_relaxed(addr) readq(addr) +#define readb_relaxed(addr) readb(addr) +#define readw_relaxed(addr) readw(addr) +#define readl_relaxed(addr) readl(addr) +#define readq_relaxed(addr) readq(addr) +#define writeb_relaxed(v, addr) writeb(v, addr) +#define writew_relaxed(v, addr) writew(v, addr) +#define writel_relaxed(v, addr) writel(v, addr) +#define writeq_relaxed(v, addr) writeq(v, addr) #ifdef CONFIG_PPC32 #define mmiowb()