From patchwork Thu May 22 16:47:24 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 30653 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ig0-f198.google.com (mail-ig0-f198.google.com [209.85.213.198]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id B3C5620671 for ; Thu, 22 May 2014 16:56:33 +0000 (UTC) Received: by mail-ig0-f198.google.com with SMTP id uq10sf10302558igb.5 for ; Thu, 22 May 2014 09:56:33 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=c8Xy/aMbQkJ+y8kjyZE7ltLPucLlOOMoRny2ImPmD8Y=; b=I+qZZX51FI198saqmdK/MOaRtRo4icYglOcRv2GGrxwAI5Lgc3OBoDp2CAg3be9TSz VfNRRjuup6FH0L7s2c6ReCR0bYZakBK8h+JqFGRkMtX4XVI2BpJxK4ZNq6gpo0npIn2D QbP8ezUStGpksuVNI68e0zkD5mo6pXSPHsIP6mVo2enEAZyFqmQg6YOszIlOC0+mf4ib 3bIFiT5aIgo0P6mZouScErMkyv/BM01WeflsYCjXW6iyGLVT/wdrkwbyUyLEhExw7GXJ TmQ6yJwnIOQfY/vL37bb3nK3t7TekE6VG1OairtQtbLyoa/fk5ILhY4nNgT9+SxYvOvk 281Q== X-Gm-Message-State: ALoCoQlemv4l7ilJRd2/+xbsTvtkbacO6K8aaaTpDWa+mgLu7xRSoBUtDFWx5TXhEe2GN1jCnUxP X-Received: by 10.43.31.81 with SMTP id sf17mr23781066icb.4.1400777793190; Thu, 22 May 2014 09:56:33 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.104.234 with SMTP id a97ls1271213qgf.51.gmail; Thu, 22 May 2014 09:56:33 -0700 (PDT) X-Received: by 10.52.230.34 with SMTP id sv2mr1708141vdc.57.1400777793021; Thu, 22 May 2014 09:56:33 -0700 (PDT) Received: from mail-ve0-f170.google.com (mail-ve0-f170.google.com [209.85.128.170]) by mx.google.com with ESMTPS id vn2si201521vec.106.2014.05.22.09.56.33 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 22 May 2014 09:56:33 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.170 as permitted sender) client-ip=209.85.128.170; Received: by mail-ve0-f170.google.com with SMTP id db11so4841238veb.1 for ; Thu, 22 May 2014 09:56:32 -0700 (PDT) X-Received: by 10.220.95.2 with SMTP id b2mr1578279vcn.61.1400777792955; Thu, 22 May 2014 09:56:32 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.221.72 with SMTP id ib8csp215640vcb; Thu, 22 May 2014 09:56:32 -0700 (PDT) X-Received: by 10.68.106.130 with SMTP id gu2mr68871189pbb.59.1400777792193; Thu, 22 May 2014 09:56:32 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id gm1si387289pbd.252.2014.05.22.09.56.31 for ; Thu, 22 May 2014 09:56:31 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753439AbaEVQ4X (ORCPT + 27 others); Thu, 22 May 2014 12:56:23 -0400 Received: from cam-admin0.cambridge.arm.com ([217.140.96.50]:48865 "EHLO cam-admin0.cambridge.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752804AbaEVQsP (ORCPT ); Thu, 22 May 2014 12:48:15 -0400 Received: from edgewater-inn.cambridge.arm.com (edgewater-inn.cambridge.arm.com [10.1.203.25]) by cam-admin0.cambridge.arm.com (8.12.6/8.12.6) with ESMTP id s4MGlZwo028196; Thu, 22 May 2014 17:47:36 +0100 (BST) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id E1D601AE3415; Thu, 22 May 2014 17:47:34 +0100 (BST) From: Will Deacon To: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org Cc: arnd@arndb.de, monstr@monstr.eu, dhowells@redhat.com, broonie@linaro.org, benh@kernel.crashing.org, peterz@infradead.org, paulmck@linux.vnet.ibm.com, Will Deacon , Helge Deller Subject: [PATCH v2 12/18] parisc: io: implement dummy relaxed accessor macros for writes Date: Thu, 22 May 2014 17:47:24 +0100 Message-Id: <1400777250-17335-13-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 1.9.2 In-Reply-To: <1400777250-17335-1-git-send-email-will.deacon@arm.com> References: <1400777250-17335-1-git-send-email-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: will.deacon@arm.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.170 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , write{b,w,l,q}_relaxed are implemented by some architectures in order to permit memory-mapped I/O accesses with weaker barrier semantics than the non-relaxed variants. This patch adds dummy macros for the write accessors to parisc, in the same vein as the dummy definitions for the relaxed read accessors. Cc: Helge Deller Signed-off-by: Will Deacon --- arch/parisc/include/asm/io.h | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/parisc/include/asm/io.h b/arch/parisc/include/asm/io.h index 1f6d2ae7aba5..8cd0abf28ffb 100644 --- a/arch/parisc/include/asm/io.h +++ b/arch/parisc/include/asm/io.h @@ -217,10 +217,14 @@ static inline void writeq(unsigned long long q, volatile void __iomem *addr) #define writel writel #define writeq writeq -#define readb_relaxed(addr) readb(addr) -#define readw_relaxed(addr) readw(addr) -#define readl_relaxed(addr) readl(addr) -#define readq_relaxed(addr) readq(addr) +#define readb_relaxed(addr) readb(addr) +#define readw_relaxed(addr) readw(addr) +#define readl_relaxed(addr) readl(addr) +#define readq_relaxed(addr) readq(addr) +#define writeb_relaxed(b, addr) writeb(b, addr) +#define writew_relaxed(w, addr) writew(w, addr) +#define writel_relaxed(l, addr) writel(l, addr) +#define writeq_relaxed(q, addr) writeq(q, addr) #define mmiowb() do { } while (0)