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[192.35.156.11]) by mx.google.com with ESMTPSA id av2sm9011004pbc.16.2014.05.09.12.34.15 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 09 May 2014 12:34:16 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: Mike Turquette Cc: galak@codeaurora.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v2] clk: qcom: add clocks necessary for apq8064 sdcc Date: Fri, 9 May 2014 12:34:05 -0700 Message-Id: <1399664045-18870-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1399661305-11641-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1399661305-11641-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: srinivas.kandagatla@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.180 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Srinivas Kandagatla This patch adds clocks necessary for SD card controller on apq8064 SOC. Without this patch the clocks are visible to the sdcc driver. Signed-off-by: Srinivas Kandagatla Reviewed-by: Kumar Gala --- drivers/clk/qcom/gcc-msm8960.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/clk/qcom/gcc-msm8960.c b/drivers/clk/qcom/gcc-msm8960.c index f4ffd91..c47a758 100644 --- a/drivers/clk/qcom/gcc-msm8960.c +++ b/drivers/clk/qcom/gcc-msm8960.c @@ -2876,6 +2876,14 @@ static struct clk_regmap *gcc_apq8064_clks[] = { [GSBI7_QUP_SRC] = &gsbi7_qup_src.clkr, [GSBI7_QUP_CLK] = &gsbi7_qup_clk.clkr, [GSBI7_H_CLK] = &gsbi7_h_clk.clkr, + [SDC1_SRC] = &sdc1_src.clkr, + [SDC1_CLK] = &sdc1_clk.clkr, + [SDC2_SRC] = &sdc2_src.clkr, + [SDC2_CLK] = &sdc2_clk.clkr, + [SDC3_SRC] = &sdc3_src.clkr, + [SDC3_CLK] = &sdc3_clk.clkr, + [SDC4_SRC] = &sdc4_src.clkr, + [SDC4_CLK] = &sdc4_clk.clkr, }; static const struct regmap_config gcc_msm8960_regmap_config = {