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[209.132.180.67]) by mx.google.com with ESMTP id hu10si2224168pbc.315.2014.05.09.06.02.23; Fri, 09 May 2014 06:02:23 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756713AbaEINCT (ORCPT + 27 others); Fri, 9 May 2014 09:02:19 -0400 Received: from mail-pd0-f181.google.com ([209.85.192.181]:39038 "EHLO mail-pd0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756657AbaEINCN (ORCPT ); Fri, 9 May 2014 09:02:13 -0400 Received: by mail-pd0-f181.google.com with SMTP id w10so3663526pde.26 for ; Fri, 09 May 2014 06:02:13 -0700 (PDT) X-Received: by 10.66.139.38 with SMTP id qv6mr20126532pab.123.1399640533468; Fri, 09 May 2014 06:02:13 -0700 (PDT) Received: from linaro.sisodomain.com ([14.140.216.146]) by mx.google.com with ESMTPSA id qq5sm7556184pbb.24.2014.05.09.06.02.07 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 09 May 2014 06:02:11 -0700 (PDT) From: Tushar Behera To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: mturquette@linaro.org, t.figa@samsung.com, kgene.kim@samsung.com, galak@codeaurora.org, ijc+devicetree@hellion.org.uk, mark.rutland@arm.com, pawel.moll@arm.com, robh+dt@kernel.org Subject: [PATCH 4/4] ARM: dts: Add pmu-syscon handle for Exynos5420/Exynos5250 clock Date: Fri, 9 May 2014 18:30:10 +0530 Message-Id: <1399640410-30957-5-git-send-email-tushar.behera@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1399640410-30957-1-git-send-email-tushar.behera@linaro.org> References: <1399640410-30957-1-git-send-email-tushar.behera@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: tushar.behera@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.171 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , XCLKOUT in Exynos5420/Exynos5250 is controlled through a register in PMU domain. Pass pmu-syscon handle to the clock driver so that XCLKOUT can be properly configured. Signed-off-by: Tushar Behera CC: Kukjin Kim --- arch/arm/boot/dts/exynos5250.dtsi | 1 + arch/arm/boot/dts/exynos5420.dtsi | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 3742331..214db94 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -86,6 +86,7 @@ compatible = "samsung,exynos5250-clock"; reg = <0x10010000 0x30000>; #clock-cells = <1>; + samsung,pmu-syscon = <&pmu_system_controller>; }; clock_audss: audss-clock-controller@3810000 { diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index c3a9a66..489bd08 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -114,6 +114,7 @@ compatible = "samsung,exynos5420-clock"; reg = <0x10010000 0x30000>; #clock-cells = <1>; + samsung,pmu-syscon = <&pmu_system_controller>; }; clock_audss: audss-clock-controller@3810000 {