From patchwork Fri Apr 25 09:31:13 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 29043 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-pd0-f198.google.com (mail-pd0-f198.google.com [209.85.192.198]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 19503202E6 for ; Fri, 25 Apr 2014 09:31:42 +0000 (UTC) Received: by mail-pd0-f198.google.com with SMTP id w10sf5914539pde.5 for ; Fri, 25 Apr 2014 02:31:42 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=04izjNhRkayTNHRpU3gqneGS7Wevz0e3eiB32SEUXq8=; b=A8vN6YIrUOnAUImwiJAM48/GWcoEwFGwAoL4qiwkfRJiYNkVf6g3IBpy7ugkGONCLs kl4B+jm7dA/w2xJ1RZ84oNqxTo5DetuP+ys6YpndpCyAp2fIBLtVtG7cniur9wCYQI92 7wB9xvqUWHYL74Od4qHwucaxB5BGQYzprLPNtadK7D3x0Wxlmpoi8iVoPtTGNsvTkNTp H8L7/SdC8pTaIsByhTyKCOsWJHPH/dtZW/OE69e0k3ZS6j2oue3HFrkmp2tCCiXycfU0 s6NtqSbRaCJnijmJOWufAg8yVPoskBcodzJmgrOLgc9vRNtGqC96j9GVoa26JDrPnsJg XkTA== X-Gm-Message-State: ALoCoQl0g7PXQNjArTJ1X8GS8plBTcrgSm561QqAbt9vm/V+4u1x4X9jpUc6Tfyo9Lj63rPcytq7 X-Received: by 10.66.189.228 with SMTP id gl4mr2919375pac.26.1398418302332; Fri, 25 Apr 2014 02:31:42 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.81.81 with SMTP id e75ls556778qgd.29.gmail; Fri, 25 Apr 2014 02:31:42 -0700 (PDT) X-Received: by 10.221.27.8 with SMTP id ro8mr341044vcb.30.1398418302169; Fri, 25 Apr 2014 02:31:42 -0700 (PDT) Received: from mail-ve0-f173.google.com (mail-ve0-f173.google.com [209.85.128.173]) by mx.google.com with ESMTPS id a8si1569038vej.179.2014.04.25.02.31.42 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 25 Apr 2014 02:31:42 -0700 (PDT) Received-SPF: none (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) client-ip=209.85.128.173; Received: by mail-ve0-f173.google.com with SMTP id oy12so4442168veb.32 for ; Fri, 25 Apr 2014 02:31:42 -0700 (PDT) X-Received: by 10.220.162.6 with SMTP id t6mr5981284vcx.12.1398418302076; Fri, 25 Apr 2014 02:31:42 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.221.72 with SMTP id ib8csp83276vcb; Fri, 25 Apr 2014 02:31:41 -0700 (PDT) X-Received: by 10.67.24.1 with SMTP id ie1mr6491701pad.133.1398418300825; Fri, 25 Apr 2014 02:31:40 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id eg2si4417829pac.346.2014.04.25.02.31.40; Fri, 25 Apr 2014 02:31:40 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753385AbaDYJb3 (ORCPT + 28 others); Fri, 25 Apr 2014 05:31:29 -0400 Received: from fw-tnat.austin.arm.com ([217.140.110.23]:24920 "EHLO collaborate-mta1.arm.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751502AbaDYJbW (ORCPT ); Fri, 25 Apr 2014 05:31:22 -0400 Received: from e102391-lin.cambridge.arm.com (e102391-lin.cambridge.arm.com [10.1.209.166]) by collaborate-mta1.arm.com (Postfix) with ESMTP id 5205A13FCB5; Fri, 25 Apr 2014 04:31:21 -0500 (CDT) From: Marc Zyngier To: linux-kernel@vger.kernel.org, rtc-linux@googlegroups.com Cc: Russell King , Will Deacon , Catalin Marinas , Alessandro Zummo Subject: [PATCH 5/7] rtc-cmos: implement driver private locking Date: Fri, 25 Apr 2014 10:31:13 +0100 Message-Id: <1398418275-9671-6-git-send-email-marc.zyngier@arm.com> X-Mailer: git-send-email 1.8.3.4 In-Reply-To: <1398418275-9671-1-git-send-email-marc.zyngier@arm.com> References: <1398418275-9671-1-git-send-email-marc.zyngier@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: marc.zyngier@arm.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , A number of architecture happen to share a lock between the rtc-cmos driver and the core architectural code for good reasons (or at least, reasons that matter to the architecture). Other architectures don't do that, but still have to define a lock that is only used by the RTC driver. How annoying! Implement a set of driver private locking primitives, and expose a config option allowing the architecture to select it if it doesn't require to share the lock with the RTC driver. Signed-off-by: Marc Zyngier --- drivers/rtc/Kconfig | 3 +++ drivers/rtc/rtc-cmos.c | 16 ++++++++++++++++ include/asm-generic/rtc.h | 5 +++++ 3 files changed, 24 insertions(+) diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 10974f7..12bc27d 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -684,6 +684,9 @@ config RTC_DRV_CMOS_MMIO_STRICT select RTC_DRV_CMOS_MMIO bool +config RTC_DRV_CMOS_PRIV_LOCK + bool + config RTC_DRV_ALPHA bool "Alpha PC-style CMOS" depends on ALPHA diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c index e2d1338..eb5d05c 100644 --- a/drivers/rtc/rtc-cmos.c +++ b/drivers/rtc/rtc-cmos.c @@ -107,6 +107,22 @@ static inline void rtc_cmos_set_base(void __iomem *base) static void rtc_cmos_set_base(void __iomem *base) {} #endif +#ifdef CONFIG_RTC_DRV_CMOS_PRIV_LOCK +static DEFINE_SPINLOCK(rtc_private_lock); + +static unsigned long rtc_cmos_lock(void) +{ + unsigned long flags; + spin_lock_irqsave(&rtc_private_lock, flags); + return flags; +} + +static void rtc_cmos_unlock(unsigned long flags) +{ + spin_unlock_irqrestore(&rtc_private_lock, flags); +} +#endif + /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear; * always mask it against the irq enable bits in RTC_CONTROL. Bit values * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both. diff --git a/include/asm-generic/rtc.h b/include/asm-generic/rtc.h index 236693b..1d21408 100644 --- a/include/asm-generic/rtc.h +++ b/include/asm-generic/rtc.h @@ -43,6 +43,10 @@ static inline void do_cmos_write(u8 val, u8 reg) } #endif +#ifdef CONFIG_RTC_DRV_CMOS_PRIV_LOCK +static unsigned long rtc_cmos_lock(void); +static void rtc_cmos_unlock(unsigned long flags); +#else static inline unsigned long rtc_cmos_lock(void) { unsigned long flags; @@ -54,6 +58,7 @@ static inline void rtc_cmos_unlock(unsigned long flags) { spin_unlock_irqrestore(&rtc_lock, flags); } +#endif /* * Returns true if a clock update is in progress