From patchwork Tue Apr 8 12:27:43 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 27973 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-pb0-f72.google.com (mail-pb0-f72.google.com [209.85.160.72]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 6207920553 for ; Tue, 8 Apr 2014 12:27:57 +0000 (UTC) Received: by mail-pb0-f72.google.com with SMTP id jt11sf2681956pbb.3 for ; Tue, 08 Apr 2014 05:27:56 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:sender:precedence:list-id:x-original-sender :x-original-authentication-results:mailing-list:list-post:list-help :list-archive:list-unsubscribe; bh=JKT2iYD3XZs7YveqlVZbzBS45AsW/q4zZt3l3avs58M=; b=OQ+1cvVAjBEiuLxBaQfN+37W/mpK9YpSjPOtE+Z9l3IS0sExTNijV+4Ja639lkBvRE rUs47R5YGaA8QBWtMIiP1TOm2TYpq2qkrpECPxekYAFbwlyKlFICmWY3EAdoaj5EeWVW LSWZ2WsI9J8W/gSp7DiFwhHzlKVJbYKxc3aDb101cOHc/4yobbqMmfulbjkJFQaj5I9w BiZ2RFPjt8nltaidm8n3P1rqtQ9IiHtccmjaDQKcb/i89TNP1DWmCH/44iNZRGuJdJO7 d4/zSXbGIuV9VylIc3LhMw3VBxm3o7jQf2IhtRXDOaCItE+h3frV0UrIy/InzdF8Whfq hTjw== X-Gm-Message-State: ALoCoQklVxhr0MohGEYjALtdlX7SiiBdIXSxK4ZubwzrtO5crW1EH6VQ3/5ZZVpLOPktYQgemI5z X-Received: by 10.66.173.75 with SMTP id bi11mr1744228pac.4.1396960076547; Tue, 08 Apr 2014 05:27:56 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.89.136 with SMTP id v8ls184808qgd.13.gmail; Tue, 08 Apr 2014 05:27:56 -0700 (PDT) X-Received: by 10.220.162.6 with SMTP id t6mr3087431vcx.12.1396960076400; Tue, 08 Apr 2014 05:27:56 -0700 (PDT) Received: from mail-ve0-f176.google.com (mail-ve0-f176.google.com [209.85.128.176]) by mx.google.com with ESMTPS id wd2si359991veb.113.2014.04.08.05.27.56 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 08 Apr 2014 05:27:56 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.128.176 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.176; Received: by mail-ve0-f176.google.com with SMTP id db11so667314veb.7 for ; Tue, 08 Apr 2014 05:27:56 -0700 (PDT) X-Received: by 10.220.92.135 with SMTP id r7mr3021980vcm.11.1396960076317; Tue, 08 Apr 2014 05:27:56 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.12.8 with SMTP id v8csp241212vcv; Tue, 8 Apr 2014 05:27:55 -0700 (PDT) X-Received: by 10.66.119.136 with SMTP id ku8mr4158185pab.121.1396960074990; Tue, 08 Apr 2014 05:27:54 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id xe4si1008094pbc.112.2014.04.08.05.27.54; Tue, 08 Apr 2014 05:27:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756662AbaDHM1x (ORCPT + 1 other); Tue, 8 Apr 2014 08:27:53 -0400 Received: from mail-wi0-f176.google.com ([209.85.212.176]:41284 "EHLO mail-wi0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756036AbaDHM1v (ORCPT ); Tue, 8 Apr 2014 08:27:51 -0400 Received: by mail-wi0-f176.google.com with SMTP id r20so6902967wiv.15 for ; Tue, 08 Apr 2014 05:27:50 -0700 (PDT) X-Received: by 10.194.89.168 with SMTP id bp8mr1705537wjb.73.1396960070322; Tue, 08 Apr 2014 05:27:50 -0700 (PDT) Received: from localhost.localdomain ([85.235.11.236]) by mx.google.com with ESMTPSA id ll1sm3041534wjc.6.2014.04.08.05.27.47 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 08 Apr 2014 05:27:48 -0700 (PDT) From: Linus Walleij To: linux-kernel@vger.kernel.org, Barry Song , Barry Song Cc: linux-gpio@vger.kernel.org, Linus Walleij Subject: [PATCH 1/2] pinctrl: sirf: rename inlined accessor Date: Tue, 8 Apr 2014 14:27:43 +0200 Message-Id: <1396960063-30552-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 1.9.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-gpio@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: linus.walleij@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.176 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The sirfsoc_irqchip_to_bank() is obviously misnamed, as it is not converting an irqchip to a bank but converts a gpiochip to a bank so rename it sirfsoc_gpiochip_to_bank(). Signed-off-by: Linus Walleij Acked-by: Barry Song --- drivers/pinctrl/sirf/pinctrl-sirf.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/pinctrl/sirf/pinctrl-sirf.c b/drivers/pinctrl/sirf/pinctrl-sirf.c index 76502aab2cb1..2c3eb207ff87 100644 --- a/drivers/pinctrl/sirf/pinctrl-sirf.c +++ b/drivers/pinctrl/sirf/pinctrl-sirf.c @@ -483,7 +483,7 @@ static inline struct sirfsoc_gpio_bank *sirfsoc_gpio_to_bank(unsigned int gpio) return &sgpio_bank[gpio / SIRFSOC_GPIO_BANK_SIZE]; } -static inline struct sirfsoc_gpio_bank *sirfsoc_irqchip_to_bank(struct gpio_chip *chip) +static inline struct sirfsoc_gpio_bank *sirfsoc_gpiochip_to_bank(struct gpio_chip *chip) { return container_of(to_of_mm_gpio_chip(chip), struct sirfsoc_gpio_bank, chip); } @@ -675,7 +675,7 @@ static inline void sirfsoc_gpio_set_input(struct sirfsoc_gpio_bank *bank, unsign static int sirfsoc_gpio_request(struct gpio_chip *chip, unsigned offset) { - struct sirfsoc_gpio_bank *bank = sirfsoc_irqchip_to_bank(chip); + struct sirfsoc_gpio_bank *bank = sirfsoc_gpiochip_to_bank(chip); unsigned long flags; if (pinctrl_request_gpio(chip->base + offset)) @@ -697,7 +697,7 @@ static int sirfsoc_gpio_request(struct gpio_chip *chip, unsigned offset) static void sirfsoc_gpio_free(struct gpio_chip *chip, unsigned offset) { - struct sirfsoc_gpio_bank *bank = sirfsoc_irqchip_to_bank(chip); + struct sirfsoc_gpio_bank *bank = sirfsoc_gpiochip_to_bank(chip); unsigned long flags; spin_lock_irqsave(&bank->lock, flags); @@ -712,7 +712,7 @@ static void sirfsoc_gpio_free(struct gpio_chip *chip, unsigned offset) static int sirfsoc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) { - struct sirfsoc_gpio_bank *bank = sirfsoc_irqchip_to_bank(chip); + struct sirfsoc_gpio_bank *bank = sirfsoc_gpiochip_to_bank(chip); int idx = sirfsoc_gpio_to_offset(gpio); unsigned long flags; unsigned offset; @@ -751,7 +751,7 @@ static inline void sirfsoc_gpio_set_output(struct sirfsoc_gpio_bank *bank, unsig static int sirfsoc_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, int value) { - struct sirfsoc_gpio_bank *bank = sirfsoc_irqchip_to_bank(chip); + struct sirfsoc_gpio_bank *bank = sirfsoc_gpiochip_to_bank(chip); int idx = sirfsoc_gpio_to_offset(gpio); u32 offset; unsigned long flags; @@ -769,7 +769,7 @@ static int sirfsoc_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, static int sirfsoc_gpio_get_value(struct gpio_chip *chip, unsigned offset) { - struct sirfsoc_gpio_bank *bank = sirfsoc_irqchip_to_bank(chip); + struct sirfsoc_gpio_bank *bank = sirfsoc_gpiochip_to_bank(chip); u32 val; unsigned long flags; @@ -785,7 +785,7 @@ static int sirfsoc_gpio_get_value(struct gpio_chip *chip, unsigned offset) static void sirfsoc_gpio_set_value(struct gpio_chip *chip, unsigned offset, int value) { - struct sirfsoc_gpio_bank *bank = sirfsoc_irqchip_to_bank(chip); + struct sirfsoc_gpio_bank *bank = sirfsoc_gpiochip_to_bank(chip); u32 ctrl; unsigned long flags;