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[209.132.180.67]) by mx.google.com with ESMTP id pi6si1714172pbb.100.2014.03.12.02.14.07; Wed, 12 Mar 2014 02:14:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752099AbaCLJOG (ORCPT + 9 others); Wed, 12 Mar 2014 05:14:06 -0400 Received: from mx08-00178001.pphosted.com ([62.209.51.94]:35349 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-FAIL-OK-OK) by vger.kernel.org with ESMTP id S1751833AbaCLJOF (ORCPT ); Wed, 12 Mar 2014 05:14:05 -0400 X-Greylist: delayed 1209 seconds by postgrey-1.27 at vger.kernel.org; Wed, 12 Mar 2014 05:14:04 EDT Received: from pps.filterd (m0046670.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.14.5/8.14.5) with SMTP id s2C8okN5016105; Wed, 12 Mar 2014 09:51:30 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 1jd2rjjtcw-1 (version=TLSv1/SSLv3 cipher=AES256-SHA bits=256 verify=NOT); Wed, 12 Mar 2014 09:51:30 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 92B8A62; Wed, 12 Mar 2014 08:51:22 +0000 (GMT) Received: from mail7.sgp.st.com (unknown [164.129.223.81]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 1A757B445; Wed, 12 Mar 2014 08:51:22 +0000 (GMT) Received: from lmenx29l.st.com (lmenx29l.lme.st.com [10.201.23.80]) by mail7.sgp.st.com (MOS 4.3.3-GA) with ESMTP id BYV62439 (AUTH lme00137); Wed, 12 Mar 2014 09:50:51 +0100 From: Maxime COQUELIN To: Rob Landley , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Srinivas Kandagatla , Stuart Menefy , Linus Walleij , Giuseppe Cavallaro , Maxime Coquelin , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@stlinux.com Cc: lee.jones@linaro.org Subject: [PATCH v4 3/6] pinctrl: st: add pinctrl support for the STiH407 SoC Date: Wed, 12 Mar 2014 09:50:07 +0100 Message-Id: <1394614210-15698-4-git-send-email-maxime.coquelin@st.com> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1394614210-15698-1-git-send-email-maxime.coquelin@st.com> References: <1394614210-15698-1-git-send-email-maxime.coquelin@st.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:5.11.87, 1.0.14, 0.0.0000 definitions=2014-03-12_03:2014-03-11, 2014-03-12, 1970-01-01 signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: maxime.coquelin@st.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.172 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Giuseppe Cavallaro This patch adds the initial support for pinctrl based on H407 SoC. Acked-by: Giuseppe Cavallaro Acked-by: Lee Jones Acked-by: Srinivas Kandagatla Signed-off-by: Giuseppe Cavallaro Signed-off-by: Maxime Coquelin --- drivers/pinctrl/pinctrl-st.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/pinctrl/pinctrl-st.c b/drivers/pinctrl/pinctrl-st.c index 7073eaf..39cddaa 100644 --- a/drivers/pinctrl/pinctrl-st.c +++ b/drivers/pinctrl/pinctrl-st.c @@ -390,6 +390,19 @@ static const struct st_pctl_data stih416_data = { .alt = 0, .oe = 40, .pu = 50, .od = 60, .rt = 100, }; +static const struct st_pctl_data stih407_flashdata = { + .rt_style = st_retime_style_none, + .input_delays = stih416_delays, + .ninput_delays = ARRAY_SIZE(stih416_delays), + .output_delays = stih416_delays, + .noutput_delays = ARRAY_SIZE(stih416_delays), + .alt = 0, + .oe = -1, /* Not Available */ + .pu = -1, /* Not Available */ + .od = 60, + .rt = 100, +}; + /* Low level functions.. */ static inline int st_gpio_bank(int gpio) { @@ -1598,6 +1611,10 @@ static struct of_device_id st_pctl_of_match[] = { { .compatible = "st,stih416-rear-pinctrl", .data = &stih416_data}, { .compatible = "st,stih416-fvdp-fe-pinctrl", .data = &stih416_data}, { .compatible = "st,stih416-fvdp-lite-pinctrl", .data = &stih416_data}, + { .compatible = "st,stih407-sbc-pinctrl", .data = &stih416_data}, + { .compatible = "st,stih407-front-pinctrl", .data = &stih416_data}, + { .compatible = "st,stih407-rear-pinctrl", .data = &stih416_data}, + { .compatible = "st,stih407-flash-pinctrl", .data = &stih407_flashdata}, { /* sentinel */ } };