From patchwork Wed Oct 16 10:59:35 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Richter X-Patchwork-Id: 21068 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oa0-f71.google.com (mail-oa0-f71.google.com [209.85.219.71]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 7E82725B8B for ; Wed, 16 Oct 2013 11:00:15 +0000 (UTC) Received: by mail-oa0-f71.google.com with SMTP id i3sf1698552oag.10 for ; Wed, 16 Oct 2013 04:00:15 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=mime-version:x-gm-message-state:delivered-to:sender:from:to:cc :subject:date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=ylg4I9L3cuzHRZHW47hOdVu+/cFn6IbbNw/IgHRo6Ng=; b=Hyu8Yqh72IkSGMYZes13r8r3EsHU4zpy60T1r+CTlObJchW7ipMVhboy3V5L8cpuek 1SFdl9vLJN0VkhRX5iQCpSE8r8AWvR/FqvSpw9Dc9nIrbM41eqPw1ulPK/HeUgnv9ckV 0fDHerTFC1/LZxrffpkSIFPaitr8U0j58b8zTA0h0qwlQTgocx2zFm9bSV7o3RzHTodw 4F/JRv0dfTXLrhFIvggn9T9MLT01cNhe5KwDB3kREGysL2jq8keTY2UzKqO2PHKOhhwQ xBPsXG2E8J9VnGiAHpEAuTvNzKaP4K4mOHE1gW86NloRuzHlZgsurGeM8xUowoCmSYFy KVTQ== X-Received: by 10.182.22.107 with SMTP id c11mr374332obf.46.1381921215160; Wed, 16 Oct 2013 04:00:15 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.51.169 with SMTP id l9ls471646qeo.97.gmail; Wed, 16 Oct 2013 04:00:14 -0700 (PDT) X-Received: by 10.220.174.200 with SMTP id u8mr1870789vcz.6.1381921214956; Wed, 16 Oct 2013 04:00:14 -0700 (PDT) Received: from mail-vc0-x231.google.com (mail-vc0-x231.google.com [2607:f8b0:400c:c03::231]) by mx.google.com with ESMTPS id gs7si5064455veb.53.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 16 Oct 2013 04:00:14 -0700 (PDT) Received-SPF: neutral (google.com: 2607:f8b0:400c:c03::231 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=2607:f8b0:400c:c03::231; Received: by mail-vc0-f177.google.com with SMTP id ib11so31716vcb.36 for ; Wed, 16 Oct 2013 04:00:14 -0700 (PDT) X-Gm-Message-State: ALoCoQkpJS7p9Sa6tmwpvC2I4o5zQgOHzti/K2wr+pG8jt1z1aD4rWsYJHIM6Wyzhk5KfbqX8cRC X-Received: by 10.58.161.231 with SMTP id xv7mr1828406veb.2.1381921214865; Wed, 16 Oct 2013 04:00:14 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp29655vcz; Wed, 16 Oct 2013 04:00:14 -0700 (PDT) X-Received: by 10.204.167.140 with SMTP id q12mr1823743bky.2.1381921213738; Wed, 16 Oct 2013 04:00:13 -0700 (PDT) Received: from mail-bk0-x22c.google.com (mail-bk0-x22c.google.com [2a00:1450:4008:c01::22c]) by mx.google.com with ESMTPS id tx8si11698882bkb.142.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 16 Oct 2013 04:00:13 -0700 (PDT) Received-SPF: pass (google.com: domain of rric.net@gmail.com designates 2a00:1450:4008:c01::22c as permitted sender) client-ip=2a00:1450:4008:c01::22c; Received: by mail-bk0-f44.google.com with SMTP id mz10so204783bkb.31 for ; Wed, 16 Oct 2013 04:00:12 -0700 (PDT) X-Received: by 10.205.22.71 with SMTP id qv7mr1897424bkb.20.1381921212540; Wed, 16 Oct 2013 04:00:12 -0700 (PDT) Received: from rric.localhost (f053084124.adsl.alicedsl.de. [78.53.84.124]) by mx.google.com with ESMTPSA id kk2sm46597269bkb.10.1969.12.31.16.00.00 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 16 Oct 2013 04:00:11 -0700 (PDT) Sender: Robert Richter From: Robert Richter To: linux-edac@vger.kernel.org Cc: Rob Herring , linux-kernel@vger.kernel.org, Robert Richter , Robert Richter Subject: [PATCH 2/5] ARM: dts: calxeda: move memory-controller node out of ecx-common.dtsi Date: Wed, 16 Oct 2013 12:59:35 +0200 Message-Id: <1381921178-28511-3-git-send-email-rric@kernel.org> X-Mailer: git-send-email 1.8.4.rc3 In-Reply-To: <1381921178-28511-1-git-send-email-rric@kernel.org> References: <1381921178-28511-1-git-send-email-rric@kernel.org> X-Original-Sender: rric.net@gmail.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c03::231 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org; dkim=pass header.i=@gmail.com Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Rob Herring The DDR controller is slightly different in ECX-2000 and ECX-1000, so we need to have different nodes for each platform. Signed-off-by: Rob Herring [Device Tree documentation updated.] Signed-off-by: Robert Richter --- Documentation/devicetree/bindings/arm/calxeda/mem-ctrlr.txt | 4 +++- arch/arm/boot/dts/ecx-2000.dts | 6 ++++++ arch/arm/boot/dts/ecx-common.dtsi | 6 ------ arch/arm/boot/dts/highbank.dts | 6 ++++++ 4 files changed, 15 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/calxeda/mem-ctrlr.txt b/Documentation/devicetree/bindings/arm/calxeda/mem-ctrlr.txt index f770ac0..0496759 100644 --- a/Documentation/devicetree/bindings/arm/calxeda/mem-ctrlr.txt +++ b/Documentation/devicetree/bindings/arm/calxeda/mem-ctrlr.txt @@ -1,7 +1,9 @@ Calxeda DDR memory controller Properties: -- compatible : Should be "calxeda,hb-ddr-ctrl" +- compatible : Should be: + - "calxeda,hb-ddr-ctrl" for ECX-1000 + - "calxeda,ecx-2000-ddr-ctrl" for ECX-2000 - reg : Address and size for DDR controller registers. - interrupts : Interrupt for DDR controller. diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts index 139b40c..2ccbb57f 100644 --- a/arch/arm/boot/dts/ecx-2000.dts +++ b/arch/arm/boot/dts/ecx-2000.dts @@ -85,6 +85,12 @@ <1 10 0xf08>; }; + memory-controller@fff00000 { + compatible = "calxeda,ecx-2000-ddr-ctrl"; + reg = <0xfff00000 0x1000>; + interrupts = <0 91 4>; + }; + intc: interrupt-controller@fff11000 { compatible = "arm,cortex-a15-gic"; #interrupt-cells = <3>; diff --git a/arch/arm/boot/dts/ecx-common.dtsi b/arch/arm/boot/dts/ecx-common.dtsi index e8559b7..f95988f 100644 --- a/arch/arm/boot/dts/ecx-common.dtsi +++ b/arch/arm/boot/dts/ecx-common.dtsi @@ -45,12 +45,6 @@ status = "disabled"; }; - memory-controller@fff00000 { - compatible = "calxeda,hb-ddr-ctrl"; - reg = <0xfff00000 0x1000>; - interrupts = <0 91 4>; - }; - ipc@fff20000 { compatible = "arm,pl320", "arm,primecell"; reg = <0xfff20000 0x1000>; diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts index 6aad34a..ed14aea 100644 --- a/arch/arm/boot/dts/highbank.dts +++ b/arch/arm/boot/dts/highbank.dts @@ -86,6 +86,12 @@ soc { ranges = <0x00000000 0x00000000 0xffffffff>; + memory-controller@fff00000 { + compatible = "calxeda,hb-ddr-ctrl"; + reg = <0xfff00000 0x1000>; + interrupts = <0 91 4>; + }; + timer@fff10600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xfff10600 0x20>;