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Tue, 25 Jun 2013 14:19:48 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 076F8304; Tue, 25 Jun 2013 14:19:16 +0000 (GMT) Received: from relay2.stm.gmessaging.net (unknown [10.230.100.18]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5DB9E5095; Tue, 25 Jun 2013 14:18:52 +0000 (GMT) Received: from exdcvycastm022.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm022", Issuer "exdcvycastm022" (not verified)) by relay2.stm.gmessaging.net (Postfix) with ESMTPS id 4BF53A8083; Tue, 25 Jun 2013 16:19:10 +0200 (CEST) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.30) with Microsoft SMTP Server (TLS) id 8.3.279.5; Tue, 25 Jun 2013 16:19:15 +0200 From: Linus Walleij To: , Cc: Stephen Warren , Tony Lindgren , Linus Walleij , Rob Landley , Christian Ruppert Subject: [PATCH] pinctrl: elaborate a bit on arrangements in doc Date: Tue, 25 Jun 2013 16:19:12 +0200 Message-ID: <1372169952-22439-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQlaOvwxkHHay0R07uV2UfhRQfD4Ty+a6didh7eqosRjxIMs1Nr1litNGN71lx17s18L6/sb X-Original-Sender: linus.walleij@stericsson.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c01::231 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Linus Walleij This elaborates a bit on the pinctrl vs GPIO arangements in the hardware. Inspired by some drawings in a mail from Christian Ruppert. Cc: Rob Landley Cc: Christian Ruppert Signed-off-by: Linus Walleij --- Documentation/pinctrl.txt | 37 ++++++++++++++++++++++++++++++++----- 1 file changed, 32 insertions(+), 5 deletions(-) diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt index 447fd4c..41ecad0 100644 --- a/Documentation/pinctrl.txt +++ b/Documentation/pinctrl.txt @@ -784,11 +784,38 @@ special GPIO-handler is registered. GPIO mode pitfalls ================== -Sometime the developer may be confused by a datasheet talking about a pin -being possible to set into "GPIO mode". It appears that what hardware -engineers mean with "GPIO mode" is not necessarily the use case that is -implied in the kernel interface : a pin that you grab from -kernel code and then either listen for input or drive high/low to +The GPIO portions of a pin and its relation to a certain pin controller +logic can be constructed in several ways. Here are three examples: + +(A) + + +- SPI + Physical pins --- GPIO --- pinctrl -+- I2C + +- mmc + +(B) + +- GPIO + Physical pins -+ +- SPI + +- pinctrl -+- I2C + +- mmc + +(C) + +- SPI + Physical pins --- pinctrl -+- I2C + +- mmc + +- GPIO + +In (A) the GPIO-like functionality of the pin is *always* available. +For example it is possible to read the GPIO input register to "spy" on +the SPI, I2C or MMC line while it is being used by the peripheral. +In (B) the GPIO functionality is orthogonal to any device using the +pin, and in (C) the GPIO case is the same as "some peripheral". + +For this reason the developer may be confused by a datasheet talking +about a pin being possible to set into "GPIO mode". It appears that what +hardware engineers mean with "GPIO mode" is not necessarily the use case +that is implied in the kernel interface : a pin that you +grab from kernel code and then either listen for input or drive high/low to assert/deassert some external line. Rather hardware engineers think that "GPIO mode" means that you can