From patchwork Tue Apr 2 08:20:40 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tushar Behera X-Patchwork-Id: 15808 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 7922323E00 for ; Tue, 2 Apr 2013 08:32:21 +0000 (UTC) Received: from mail-ve0-f173.google.com (mail-ve0-f173.google.com [209.85.128.173]) by fiordland.canonical.com (Postfix) with ESMTP id 214D6A1A348 for ; Tue, 2 Apr 2013 08:32:21 +0000 (UTC) Received: by mail-ve0-f173.google.com with SMTP id cy12so169536veb.32 for ; Tue, 02 Apr 2013 01:32:20 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:x-received:from:to:cc:subject:date:message-id:x-mailer :x-gm-message-state; bh=uhQz/szZ3L0Tp2D4scrleSEP9gVtOinPEWjj1UMEXFk=; b=VkL4cChLvA1aysa3r/+b2/E9QMFO/lUVDO49HBuHWmYktZRR/pcL9uWjdflUeIEkW2 ZzWj2aRaES3mfVvStN4mu8MBnyykpEKq7oGiDDC44kxZoulM2JmqzlovCf6NrQVjmjyj 8b9Z9Grcl8G7x0AGYiZp+U8s0IMs0gaFA5zJRb67lG4RMkn2mkNarhKnkboyJlHN5r3S ZhOriapw7XcUMmuRP9ZeSk5VAfmaRkQLD6bEQs2dpR7RvVGA3OhBELuhvC7uLDY1sFDf e9n7HH6BuYzoO3CbA1j9EU6JfTZjen9oIBSCiTdTd2sXJ1of0fqvlrUjbhuoU1VQ5tVI ZYPw== X-Received: by 10.52.76.103 with SMTP id j7mr10164150vdw.90.1364891540627; Tue, 02 Apr 2013 01:32:20 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.59.4.204 with SMTP id cg12csp115162ved; Tue, 2 Apr 2013 01:32:20 -0700 (PDT) X-Received: by 10.66.102.10 with SMTP id fk10mr24106660pab.169.1364891539614; Tue, 02 Apr 2013 01:32:19 -0700 (PDT) Received: from mail-pb0-f43.google.com (mail-pb0-f43.google.com [209.85.160.43]) by mx.google.com with ESMTPS id oy4si1256850pac.12.2013.04.02.01.32.19 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 02 Apr 2013 01:32:19 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.160.43 is neither permitted nor denied by best guess record for domain of tushar.behera@linaro.org) client-ip=209.85.160.43; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.160.43 is neither permitted nor denied by best guess record for domain of tushar.behera@linaro.org) smtp.mail=tushar.behera@linaro.org Received: by mail-pb0-f43.google.com with SMTP id md4so117949pbc.2 for ; Tue, 02 Apr 2013 01:32:19 -0700 (PDT) X-Received: by 10.68.211.37 with SMTP id mz5mr23399591pbc.83.1364891539010; Tue, 02 Apr 2013 01:32:19 -0700 (PDT) Received: from linaro.sisodomain.com ([115.113.119.130]) by mx.google.com with ESMTPS id ce16sm1480848pac.5.2013.04.02.01.32.16 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 02 Apr 2013 01:32:18 -0700 (PDT) From: Tushar Behera To: linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: mturquette@linaro.org, kgene.kim@samsung.com, patches@linaro.org, Thomas Abraham Subject: [PATCH] clk: exynos5250: Fix divider values for sclk_mmc{0,1,2,3} Date: Tue, 2 Apr 2013 13:50:40 +0530 Message-Id: <1364890840-20052-1-git-send-email-tushar.behera@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-Gm-Message-State: ALoCoQkeduH1vPO+xylV5g0iEFvcBmw7YcJiRoTYSPymPjTnUfmXH2oN3Tdq8gZKTIP/Q0exncC7 In legacy setup, sclk_mmc{0,1,2,3} used PRE_RATIO bit-field (8-bit wide) instead of RATIO bit-field (4-bit wide) for dividing clock rate. With current common clock setup, we are using RATIO bit-field which is creating FIFO read errors while accessing eMMC. Changing over to use PRE_RATIO bit-field fixes this issue. dwmmc_exynos 12200000.dwmmc0: data FIFO error (status=00008020) mmcblk0: error -5 transferring data, sector 1, nr 7, cmd response 0x900, card status 0x0 end_request: I/O error, dev mmcblk0, sector 1 Signed-off-by: Tushar Behera CC: Thomas Abraham Acked-by: Mike Turquette --- Based on Kukjin's for-next branch. commit d58f6a153f40 ("Merge branch 'next/clk-exynos-2' into for-next") drivers/clk/samsung/clk-exynos5250.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index 1152125..2c46fbd 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -274,10 +274,10 @@ struct samsung_div_clock exynos5250_div_clks[] __initdata = { DIV(none, "div_pcm0", "sclk_audio0", DIV_MAU, 4, 8), DIV(none, "div_sata", "mout_sata", DIV_FSYS0, 20, 4), DIV(none, "div_usb3", "mout_usb3", DIV_FSYS0, 24, 4), - DIV(none, "div_mmc0", "mout_mmc0", DIV_FSYS1, 0, 4), - DIV(none, "div_mmc1", "mout_mmc1", DIV_FSYS1, 16, 4), - DIV(none, "div_mmc2", "mout_mmc2", DIV_FSYS2, 0, 4), - DIV(none, "div_mmc3", "mout_mmc3", DIV_FSYS2, 16, 4), + DIV(none, "div_mmc0", "mout_mmc0", DIV_FSYS1, 8, 8), + DIV(none, "div_mmc1", "mout_mmc1", DIV_FSYS1, 24, 8), + DIV(none, "div_mmc2", "mout_mmc2", DIV_FSYS2, 8, 8), + DIV(none, "div_mmc3", "mout_mmc3", DIV_FSYS2, 24, 8), DIV(none, "div_uart0", "mout_uart0", DIV_PERIC0, 0, 4), DIV(none, "div_uart1", "mout_uart1", DIV_PERIC0, 4, 4), DIV(none, "div_uart2", "mout_uart2", DIV_PERIC0, 8, 4),