From patchwork Tue Feb 5 19:48:22 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 14563 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 8B85E23E92 for ; Tue, 5 Feb 2013 19:49:22 +0000 (UTC) Received: from mail-ve0-f180.google.com (mail-ve0-f180.google.com [209.85.128.180]) by fiordland.canonical.com (Postfix) with ESMTP id D958CA198A0 for ; Tue, 5 Feb 2013 19:49:21 +0000 (UTC) Received: by mail-ve0-f180.google.com with SMTP id jx10so465285veb.11 for ; Tue, 05 Feb 2013 11:49:21 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:mime-version:content-type:x-gm-message-state; bh=qUPd+R4ii7E2Xfuvb1J7mWCwzWAwd1ootvwMXncBRuk=; b=g9ELdvfPBHBvlwsGNvwkQMKXI6gkE8i4pVBC5Fj43s0KBeoZz/vGi+BjhTv/nKhAp2 UMpLV6MDVYc5X1LgfbLi++FjZw1hRqTuah9+BnSFZ9Q31VYF6qewrMSB8FTXkrLmp49W DGqbudKA4590F6PGixoW7A8GijeOUKi6YnI6JisGEBMKpOaIia4/OSmzVmz1cb4Sb14h tSemOg/xeI7T0EySLzMyZRt49UKeWQLccnNQQ4oxvoz2zwNfwWbSMjIrbWQ1RapJ2AKP rsPS9waGqu+nBjW89Pab8QkYZyqgWPO71BurzVE9S+9CIIuPkAoTBiOWe7jq/KJineoW Tmyg== X-Received: by 10.220.149.200 with SMTP id u8mr27814072vcv.7.1360093761397; Tue, 05 Feb 2013 11:49:21 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.58.252.8 with SMTP id zo8csp143959vec; Tue, 5 Feb 2013 11:49:20 -0800 (PST) X-Received: by 10.14.200.137 with SMTP id z9mr72525094een.20.1360093760335; Tue, 05 Feb 2013 11:49:20 -0800 (PST) Received: from eu1sys200aog120.obsmtp.com (eu1sys200aog120.obsmtp.com [207.126.144.149]) by mx.google.com with SMTP id 7si33199448eec.66.2013.02.05.11.49.03 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 05 Feb 2013 11:49:20 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.149 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) client-ip=207.126.144.149; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.149 is neither permitted nor denied by best guess record for domain of linus.walleij@stericsson.com) smtp.mail=linus.walleij@stericsson.com Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob120.postini.com ([207.126.147.11]) with SMTP ID DSNKURFiL1qVKQ2GYFpW8qkmukz9QRYcKEem@postini.com; Tue, 05 Feb 2013 19:49:20 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 23FDEF2; Tue, 5 Feb 2013 19:48:52 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id AB9135226; Tue, 5 Feb 2013 19:48:52 +0000 (GMT) Received: from exdcvycastm022.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm022", Issuer "exdcvycastm022" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id A04AA24C2AB; Tue, 5 Feb 2013 20:48:42 +0100 (CET) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.30) with Microsoft SMTP Server (TLS) id 8.3.83.0; Tue, 5 Feb 2013 20:48:51 +0100 From: Linus Walleij To: , Cc: Stephen Warren , Anmar Oueja , Lee Jones , Samuel Ortiz , Linus Walleij Subject: [PATCH 01/14] mfd: ab8500: prepare to handle AB8500 GPIO's IRQs correctly Date: Tue, 5 Feb 2013 20:48:22 +0100 Message-ID: <1360093715-6348-2-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 In-Reply-To: <1360093715-6348-1-git-send-email-linus.walleij@stericsson.com> References: <1360093715-6348-1-git-send-email-linus.walleij@stericsson.com> MIME-Version: 1.0 X-Gm-Message-State: ALoCoQkkUQ1Z+HJ7cHSJMX/CIfcvI09LS1OaMDH0L3ms7brEWn8sPRQ3vXNM9Pga1zzpgpjm5SOV From: Lee Jones In an upcoming patch, the gpio-ab8500 driver will relinquish all IRQ handling capability and pass it back into the AB8500 core driver. This will aid in reducing massive code duplication within the kernel. Also, most of the functionality is already in the AB8500 core driver, as the GPIO IRQs are actually sandwiched between lots of other IRQs which the core driver already handles. All we're doing here is providing the core driver with knowledge that each GPIO has two IRQs assigned to it; one for rising and a separate one for falling. Cc: Samuel Ortiz Signed-off-by: Lee Jones Signed-off-by: Linus Walleij --- Sam, it'd be nice if you could ACK these first four patches, the series basically simplifies things a lot by not cascading the AB8500 IRQs and duplicate code in the pinctrl driver. --- drivers/mfd/ab8500-core.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/ab8500-core.c b/drivers/mfd/ab8500-core.c index e1650ba..e1ba0be 100644 --- a/drivers/mfd/ab8500-core.c +++ b/drivers/mfd/ab8500-core.c @@ -367,16 +367,40 @@ static void ab8500_irq_mask(struct irq_data *data) int mask = 1 << (offset % 8); ab8500->mask[index] |= mask; + + /* The AB8500 GPIOs have two interrupts each (rising & falling). */ + if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R) + ab8500->mask[index + 2] |= mask; + if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R) + ab8500->mask[index + 1] |= mask; + if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R) + ab8500->mask[index] |= (mask >> 1); } static void ab8500_irq_unmask(struct irq_data *data) { struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data); + unsigned int type = irqd_get_trigger_type(data); int offset = data->hwirq; int index = offset / 8; int mask = 1 << (offset % 8); - ab8500->mask[index] &= ~mask; + if (type & IRQ_TYPE_EDGE_RISING) + ab8500->mask[index] &= ~mask; + + /* The AB8500 GPIOs have two interrupts each (rising & falling). */ + if (type & IRQ_TYPE_EDGE_FALLING) { + if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R) + ab8500->mask[index + 2] &= ~mask; + else if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R) + ab8500->mask[index + 1] &= ~mask; + else if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R) + ab8500->mask[index] &= ~(mask >> 1); + else + ab8500->mask[index] &= ~mask; + } else + /* Satisfies the case where type is not set. */ + ab8500->mask[index] &= ~mask; } static struct irq_chip ab8500_irq_chip = {